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authorPeter Maydell <peter.maydell@linaro.org>2018-02-20 17:47:14 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-02-20 17:47:14 +0000
commit19dd303134e479e1a674eed62a7cf892cbdc093a (patch)
treef9ac2f8fa1f577238e481ceb8aa891fc1d0a19de /hw/arm/Makefile.objs
parent2d39fb82924f01f80202cfe4fc042d267b894e84 (diff)
downloadqemu-arm-v8m.tar.gz
mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA imagev8m
Define a new board model for the MPS2 with an AN505 FPGA image containing a Cortex-M33. Since the FPGA images for TrustZone cores (AN505, and the similar AN519 for Cortex-M23) have a significantly different layout of devices to the non-TrustZone images, we use a new source file rather than shoehorning them into the existing mps2.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/Makefile.objs')
-rw-r--r--hw/arm/Makefile.objs1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 79cd30bb92..232258160a 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -19,5 +19,6 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
obj-$(CONFIG_MPS2) += mps2.o
+obj-$(CONFIG_MPS2) += mps2-tz.o
obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o
obj-$(CONFIG_IOTKIT) += iotkit.o