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authorAndreas Färber <afaerber@suse.de>2013-07-07 12:40:38 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-27 00:04:01 +0200
commit30028739eb6b2e95b94b957f3b4f8f258da3aa88 (patch)
tree5c21bc0331694ac305fa5ecdff83283ee3a48296 /gdbstub.c
parent814ac26c2d3820b85f05b696735d4e1e6d7d05aa (diff)
downloadqemu-arm-30028739eb6b2e95b94b957f3b4f8f258da3aa88.tar.gz
target-openrisc: Move cpu_gdb_{read,write}_register()
Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'gdbstub.c')
-rw-r--r--gdbstub.c57
1 files changed, 1 insertions, 56 deletions
diff --git a/gdbstub.c b/gdbstub.c
index 7ee0870065..7bcdd3f064 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -554,63 +554,8 @@ static int put_packet(GDBState *s, const char *buf)
#elif defined(TARGET_OPENRISC)
-static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
-{
- if (n < 32) {
- GET_REG32(env->gpr[n]);
- } else {
- switch (n) {
- case 32: /* PPC */
- GET_REG32(env->ppc);
-
- case 33: /* NPC */
- GET_REG32(env->npc);
-
- case 34: /* SR */
- GET_REG32(env->sr);
-
- default:
- break;
- }
- }
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUOpenRISCState *env,
- uint8_t *mem_buf, int n)
-{
- OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
- uint32_t tmp;
-
- if (n > cc->gdb_num_core_regs) {
- return 0;
- }
-
- tmp = ldl_p(mem_buf);
-
- if (n < 32) {
- env->gpr[n] = tmp;
- } else {
- switch (n) {
- case 32: /* PPC */
- env->ppc = tmp;
- break;
+#include "target-openrisc/gdbstub.c"
- case 33: /* NPC */
- env->npc = tmp;
- break;
-
- case 34: /* SR */
- env->sr = tmp;
- break;
-
- default:
- break;
- }
- }
- return 4;
-}
#elif defined (TARGET_SH4)
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */