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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-07 22:00:49 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-07 22:00:49 +0000
commit70976a7926b42d87e0c575412b85a8f5c1e48fad (patch)
tree36530e718baf82bd9c41af4458b42b5d9a828f98 /gdb-xml
parente60f469ca80e0b39b7cf85aef0d3b1ff32a67cba (diff)
downloadqemu-arm-70976a7926b42d87e0c575412b85a8f5c1e48fad.tar.gz
Fix off-by-one errors for Altivec and SPE registers
Altivec and SPE both have 34 registers in their register sets, not 35 with a missing register 32. GDB would ask for register 32 of the Altivec (resp. SPE) registers and the code would claim it had zero width. The QEMU GDB stub code would then return an E14 to GDB, which would complain about not being sure whether p packets were supported or not. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6769 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'gdb-xml')
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