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authorAndreas Färber <afaerber@suse.de>2012-04-26 00:15:56 +0200
committerBlue Swirl <blauwirbel@gmail.com>2012-04-28 09:13:26 +0000
commit94a49d86c536af37bf18722c23cb9b85acfb00ec (patch)
tree7ea09526488668e5c8abf6970bc1c92708052a0f /fpu
parent5aea4c589aa16d30227a71e137faa9dca6a45748 (diff)
downloadqemu-arm-94a49d86c536af37bf18722c23cb9b85acfb00ec.tar.gz
softfloat: Replace int16 type with int_fast16_t
Based on the following Coccinelle patch: @@ typedef int16, int_fast16_t; @@ -int16 +int_fast16_t Avoids a workaround for AIX. Add typedef for pre-10 Solaris. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: malc <av1474@comtv.ru> Cc: Ben Taylor <bentaylor.solx86@gmail.com> Tested-by: Bernhard Walle <bernhard@bwalle.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-macros.h18
-rw-r--r--fpu/softfloat.c114
-rw-r--r--fpu/softfloat.h7
3 files changed, 68 insertions, 71 deletions
diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h
index e82ce2332d..b5164af7fa 100644
--- a/fpu/softfloat-macros.h
+++ b/fpu/softfloat-macros.h
@@ -55,7 +55,7 @@ these four paragraphs for those parts of this code that are retained.
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
-INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
+INLINE void shift32RightJamming(uint32_t a, int_fast16_t count, uint32_t *zPtr)
{
uint32_t z;
@@ -81,7 +81,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
-INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
+INLINE void shift64RightJamming(uint64_t a, int_fast16_t count, uint64_t *zPtr)
{
uint64_t z;
@@ -117,7 +117,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
INLINE void
shift64ExtraRightJamming(
- uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
+ uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
{
uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
@@ -154,7 +154,7 @@ INLINE void
INLINE void
shift128Right(
- uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
+ uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
{
uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
@@ -189,7 +189,7 @@ INLINE void
INLINE void
shift128RightJamming(
- uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
+ uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
{
uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
@@ -243,7 +243,7 @@ INLINE void
uint64_t a0,
uint64_t a1,
uint64_t a2,
- int16 count,
+ int_fast16_t count,
uint64_t *z0Ptr,
uint64_t *z1Ptr,
uint64_t *z2Ptr
@@ -298,7 +298,7 @@ INLINE void
INLINE void
shortShift128Left(
- uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
+ uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
{
*z1Ptr = a1<<count;
@@ -320,7 +320,7 @@ INLINE void
uint64_t a0,
uint64_t a1,
uint64_t a2,
- int16 count,
+ int_fast16_t count,
uint64_t *z0Ptr,
uint64_t *z1Ptr,
uint64_t *z2Ptr
@@ -591,7 +591,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
| value.
*----------------------------------------------------------------------------*/
-static uint32_t estimateSqrt32( int16 aExp, uint32_t a )
+static uint32_t estimateSqrt32(int_fast16_t aExp, uint32_t a)
{
static const uint16_t sqrtOddAdjustments[] = {
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 50fce01c3a..b29256a8eb 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -87,7 +87,7 @@ INLINE uint32_t extractFloat16Frac(float16 a)
| Returns the exponent bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE int16 extractFloat16Exp(float16 a)
+INLINE int_fast16_t extractFloat16Exp(float16 a)
{
return (float16_val(a) >> 10) & 0x1f;
}
@@ -218,7 +218,7 @@ INLINE uint32_t extractFloat32Frac( float32 a )
| Returns the exponent bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE int16 extractFloat32Exp( float32 a )
+INLINE int_fast16_t extractFloat32Exp(float32 a)
{
return ( float32_val(a)>>23 ) & 0xFF;
@@ -259,7 +259,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM)
*----------------------------------------------------------------------------*/
static void
- normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )
+ normalizeFloat32Subnormal(uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr)
{
int8 shiftCount;
@@ -280,7 +280,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
-INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
+INLINE float32 packFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig)
{
return make_float32(
@@ -310,7 +310,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
+static float32 roundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
@@ -376,7 +376,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS
*----------------------------------------------------------------------------*/
static float32
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
+ normalizeRoundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM)
{
int8 shiftCount;
@@ -400,7 +400,7 @@ INLINE uint64_t extractFloat64Frac( float64 a )
| Returns the exponent bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE int16 extractFloat64Exp( float64 a )
+INLINE int_fast16_t extractFloat64Exp(float64 a)
{
return ( float64_val(a)>>52 ) & 0x7FF;
@@ -441,7 +441,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM)
*----------------------------------------------------------------------------*/
static void
- normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )
+ normalizeFloat64Subnormal(uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr)
{
int8 shiftCount;
@@ -462,7 +462,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
-INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
+INLINE float64 packFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig)
{
return make_float64(
@@ -492,11 +492,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
+static float64 roundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
- int16 roundIncrement, roundBits;
+ int_fast16_t roundIncrement, roundBits;
flag isTiny;
roundingMode = STATUS(float_rounding_mode);
@@ -558,7 +558,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS
*----------------------------------------------------------------------------*/
static float64
- normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
+ normalizeRoundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM)
{
int8 shiftCount;
@@ -1345,7 +1345,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM )
int32 float32_to_int32( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint32_t aSig;
uint64_t aSig64;
@@ -1376,7 +1376,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM )
int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint32_t aSig;
int32_t z;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1416,10 +1416,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
| returned.
*----------------------------------------------------------------------------*/
-int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM )
+int_fast16_t float32_to_int16_round_to_zero(float32 a STATUS_PARAM)
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint32_t aSig;
int32 z;
@@ -1468,7 +1468,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM )
int64 float32_to_int64( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint32_t aSig;
uint64_t aSig64, aSigExtra;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1505,7 +1505,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint32_t aSig;
uint64_t aSig64;
int64 z;
@@ -1549,7 +1549,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM )
float64 float32_to_float64( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1579,7 +1579,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM )
floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1609,7 +1609,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
float128 float32_to_float128( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1639,7 +1639,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM )
float32 float32_round_to_int( float32 a STATUS_PARAM)
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t lastBitMask, roundBitsMask;
int8 roundingMode;
uint32_t z;
@@ -1699,9 +1699,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint32_t aSig, bSig, zSig;
- int16 expDiff;
+ int_fast16_t expDiff;
aSig = extractFloat32Frac( a );
aExp = extractFloat32Exp( a );
@@ -1778,9 +1778,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint32_t aSig, bSig, zSig;
- int16 expDiff;
+ int_fast16_t expDiff;
aSig = extractFloat32Frac( a );
aExp = extractFloat32Exp( a );
@@ -1898,7 +1898,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM )
float32 float32_mul( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint32_t aSig, bSig;
uint64_t zSig64;
uint32_t zSig;
@@ -1961,7 +1961,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM )
float32 float32_div( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint32_t aSig, bSig, zSig;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2025,7 +2025,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM )
float32 float32_rem( float32 a, float32 b STATUS_PARAM )
{
flag aSign, zSign;
- int16 aExp, bExp, expDiff;
+ int_fast16_t aExp, bExp, expDiff;
uint32_t aSig, bSig;
uint32_t q;
uint64_t aSig64, bSig64, q64;
@@ -2131,7 +2131,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
float32 float32_muladd(float32 a, float32 b, float32 c, int flags STATUS_PARAM)
{
flag aSign, bSign, cSign, zSign;
- int16 aExp, bExp, cExp, pExp, zExp, expDiff;
+ int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff;
uint32_t aSig, bSig, cSig;
flag pInf, pZero, pSign;
uint64_t pSig64, cSig64, zSig64;
@@ -2333,7 +2333,7 @@ float32 float32_muladd(float32 a, float32 b, float32 c, int flags STATUS_PARAM)
float32 float32_sqrt( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, zExp;
+ int_fast16_t aExp, zExp;
uint32_t aSig, zSig;
uint64_t rem, term;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -2419,7 +2419,7 @@ static const float64 float32_exp2_coefficients[15] =
float32 float32_exp2( float32 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
float64 r, x, xn;
int i;
@@ -2467,7 +2467,7 @@ float32 float32_exp2( float32 a STATUS_PARAM )
float32 float32_log2( float32 a STATUS_PARAM )
{
flag aSign, zSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig, zSig, i;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -2732,7 +2732,7 @@ int float32_unordered_quiet( float32 a, float32 b STATUS_PARAM )
int32 float64_to_int32( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2760,7 +2760,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM )
int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint64_t aSig, savedASig;
int32_t z;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2804,10 +2804,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
| returned.
*----------------------------------------------------------------------------*/
-int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM )
+int_fast16_t float64_to_int16_round_to_zero(float64 a STATUS_PARAM)
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint64_t aSig, savedASig;
int32 z;
@@ -2858,7 +2858,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM )
int64 float64_to_int64( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint64_t aSig, aSigExtra;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2901,7 +2901,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM )
int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, shiftCount;
+ int_fast16_t aExp, shiftCount;
uint64_t aSig;
int64 z;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2951,7 +2951,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM )
float32 float64_to_float32( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t aSig;
uint32_t zSig;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2984,7 +2984,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
-static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
+static float16 packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig)
{
return make_float16(
(((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
@@ -2996,7 +2996,7 @@ static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
aSign = extractFloat16Sign(a);
@@ -3026,7 +3026,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint32_t aSig;
uint32_t mask;
uint32_t increment;
@@ -3127,7 +3127,7 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -3158,7 +3158,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
float128 float64_to_float128( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t aSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -3189,7 +3189,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM )
float64 float64_round_to_int( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
uint64_t z;
@@ -3262,9 +3262,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM)
static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig;
- int16 expDiff;
+ int_fast16_t expDiff;
aSig = extractFloat64Frac( a );
aExp = extractFloat64Exp( a );
@@ -3341,9 +3341,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig;
- int16 expDiff;
+ int_fast16_t expDiff;
aSig = extractFloat64Frac( a );
aExp = extractFloat64Exp( a );
@@ -3461,7 +3461,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM )
float64 float64_mul( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -3522,7 +3522,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM )
float64 float64_div( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
+ int_fast16_t aExp, bExp, zExp;
uint64_t aSig, bSig, zSig;
uint64_t rem0, rem1;
uint64_t term0, term1;
@@ -3594,7 +3594,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM )
float64 float64_rem( float64 a, float64 b STATUS_PARAM )
{
flag aSign, zSign;
- int16 aExp, bExp, expDiff;
+ int_fast16_t aExp, bExp, expDiff;
uint64_t aSig, bSig;
uint64_t q, alternateASig;
int64_t sigMean;
@@ -3685,7 +3685,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM )
float64 float64_muladd(float64 a, float64 b, float64 c, int flags STATUS_PARAM)
{
flag aSign, bSign, cSign, zSign;
- int16 aExp, bExp, cExp, pExp, zExp, expDiff;
+ int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff;
uint64_t aSig, bSig, cSig;
flag pInf, pZero, pSign;
uint64_t pSig0, pSig1, cSig0, cSig1, zSig0, zSig1;
@@ -3900,7 +3900,7 @@ float64 float64_muladd(float64 a, float64 b, float64 c, int flags STATUS_PARAM)
float64 float64_sqrt( float64 a STATUS_PARAM )
{
flag aSign;
- int16 aExp, zExp;
+ int_fast16_t aExp, zExp;
uint64_t aSig, zSig, doubleZSig;
uint64_t rem0, rem1, term0, term1;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -3951,7 +3951,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM )
float64 float64_log2( float64 a STATUS_PARAM )
{
flag aSign, zSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t aSig, aSig0, aSig1, zSig, i;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -4428,7 +4428,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM )
float128 floatx80_to_float128( floatx80 a STATUS_PARAM )
{
flag aSign;
- int16 aExp;
+ int_fast16_t aExp;
uint64_t aSig, zSig0, zSig1;
aSig = extractFloatx80Frac( a );
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 75246c4cb0..feec3a180e 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -57,9 +57,6 @@ these four paragraphs for those parts of this code that are retained.
typedef uint8_t flag;
typedef uint8_t uint8;
typedef int8_t int8;
-#ifndef _AIX
-typedef int int16;
-#endif
typedef unsigned int uint32;
typedef signed int int32;
typedef uint64_t uint64;
@@ -262,7 +259,7 @@ extern const float16 float16_default_nan;
/*----------------------------------------------------------------------------
| Software IEC/IEEE single-precision conversion routines.
*----------------------------------------------------------------------------*/
-int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM );
+int_fast16_t float32_to_int16_round_to_zero(float32 STATUS_PARAM);
uint_fast16_t float32_to_uint16_round_to_zero(float32 STATUS_PARAM);
int32 float32_to_int32( float32 STATUS_PARAM );
int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM );
@@ -366,7 +363,7 @@ extern const float32 float32_default_nan;
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
*----------------------------------------------------------------------------*/
-int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM );
+int_fast16_t float64_to_int16_round_to_zero(float64 STATUS_PARAM);
uint_fast16_t float64_to_uint16_round_to_zero(float64 STATUS_PARAM);
int32 float64_to_int32( float64 STATUS_PARAM );
int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM );