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authorPeter Maydell <peter.maydell@linaro.org>2014-11-24 16:54:27 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-11-24 18:10:19 +0000
commit75fdbe71557e06bab4d52b41234e38969acfaff2 (patch)
tree8f46490e073d36697d3dd304aaad731e16de510d /fpu/softfloat-specialize.h
parent25cbb61cdc180a441758b10eb7dd74002de01f68 (diff)
downloadqemu-arm-75fdbe71557e06bab4d52b41234e38969acfaff2.tar.gz
softfloat: reimplement SNAN_BIT_IS_ONE support
Reimplement support for architectures where the most significant bit in the mantissa is 1 for a signaling NaN rather than a quiet NaN, by adding handling for SNAN_BIT_IS_ONE being set to the functions which test values for NaN-ness. This includes restoring the bugfixes lost in the reversion where some of the float*_is_quiet_nan() functions were returning true for both signaling and quiet NaNs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu/softfloat-specialize.h')
-rw-r--r--fpu/softfloat-specialize.h74
1 files changed, 70 insertions, 4 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 187cdf6ebd..6de66ce380 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -33,6 +33,16 @@ this code that are retained.
===============================================================================
*/
+/* Does the target distinguish signaling NaNs from non-signaling NaNs
+ * by setting the most significant bit of the mantissa for a signaling NaN?
+ * (The more common choice is to have it be zero for SNaN and one for QNaN.)
+ */
+#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
+#define SNAN_BIT_IS_ONE 1
+#else
+#define SNAN_BIT_IS_ONE 0
+#endif
+
#if defined(TARGET_XTENSA)
/* Define for architectures which deviate from IEEE in not supporting
* signaling NaNs (so all NaNs are treated as quiet).
@@ -59,6 +69,8 @@ const float32 float32_default_nan = const_float32(0x7FFFFFFF);
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
defined(TARGET_XTENSA)
const float32 float32_default_nan = const_float32(0x7FC00000);
+#elif SNAN_BIT_IS_ONE
+const float32 float32_default_nan = const_float32(0xFF800000);
#else
const float32 float32_default_nan = const_float32(0xFFC00000);
#endif
@@ -70,6 +82,8 @@ const float32 float32_default_nan = const_float32(0xFFC00000);
const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
+#elif SNAN_BIT_IS_ONE
+const float64 float64_default_nan = const_float64(LIT64(0xFFF0000000000000));
#else
const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
#endif
@@ -77,8 +91,13 @@ const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
*----------------------------------------------------------------------------*/
+#if SNAN_BIT_IS_ONE
+#define floatx80_default_nan_high 0xFFFF
+#define floatx80_default_nan_low LIT64(0x8000000000000000)
+#else
#define floatx80_default_nan_high 0xFFFF
#define floatx80_default_nan_low LIT64( 0xC000000000000000 )
+#endif
const floatx80 floatx80_default_nan
= make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
@@ -87,8 +106,13 @@ const floatx80 floatx80_default_nan
| The pattern for a default generated quadruple-precision NaN. The `high' and
| `low' values hold the most- and least-significant bits, respectively.
*----------------------------------------------------------------------------*/
+#if SNAN_BIT_IS_ONE
+#define float128_default_nan_high LIT64(0xFFFF000000000000)
+#define float128_default_nan_low LIT64(0x0000000000000000)
+#else
#define float128_default_nan_high LIT64( 0xFFFF800000000000 )
#define float128_default_nan_low LIT64( 0x0000000000000000 )
+#endif
const float128 float128_default_nan
= make_float128_init(float128_default_nan_high, float128_default_nan_low);
@@ -234,7 +258,11 @@ int float32_is_signaling_nan(float32 a_)
int float32_is_quiet_nan( float32 a_ )
{
uint32_t a = float32_val(a_);
- return ( 0xFF000000 <= (uint32_t) ( a<<1 ) );
+#if SNAN_BIT_IS_ONE
+ return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
+#else
+ return ((uint32_t)(a << 1) >= 0xff800000);
+#endif
}
/*----------------------------------------------------------------------------
@@ -245,7 +273,11 @@ int float32_is_quiet_nan( float32 a_ )
int float32_is_signaling_nan( float32 a_ )
{
uint32_t a = float32_val(a_);
+#if SNAN_BIT_IS_ONE
+ return ((uint32_t)(a << 1) >= 0xff800000);
+#else
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
+#endif
}
#endif
@@ -634,7 +666,12 @@ int float64_is_signaling_nan(float64 a_)
int float64_is_quiet_nan( float64 a_ )
{
uint64_t a = float64_val(a_);
- return ( LIT64( 0xFFE0000000000000 ) <= (uint64_t) ( a<<1 ) );
+#if SNAN_BIT_IS_ONE
+ return (((a >> 51) & 0xfff) == 0xffe)
+ && (a & 0x0007ffffffffffffULL);
+#else
+ return ((a << 1) >= 0xfff0000000000000ULL);
+#endif
}
/*----------------------------------------------------------------------------
@@ -645,9 +682,13 @@ int float64_is_quiet_nan( float64 a_ )
int float64_is_signaling_nan( float64 a_ )
{
uint64_t a = float64_val(a_);
+#if SNAN_BIT_IS_ONE
+ return ((a << 1) >= 0xfff0000000000000ULL);
+#else
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
+#endif
}
#endif
@@ -823,8 +864,17 @@ int floatx80_is_signaling_nan(floatx80 a_)
int floatx80_is_quiet_nan( floatx80 a )
{
+#if SNAN_BIT_IS_ONE
+ uint64_t aLow;
+
+ aLow = a.low & ~0x4000000000000000ULL;
+ return ((a.high & 0x7fff) == 0x7fff)
+ && (aLow << 1)
+ && (a.low == aLow);
+#else
return ( ( a.high & 0x7FFF ) == 0x7FFF )
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
+#endif
}
/*----------------------------------------------------------------------------
@@ -835,6 +885,10 @@ int floatx80_is_quiet_nan( floatx80 a )
int floatx80_is_signaling_nan( floatx80 a )
{
+#if SNAN_BIT_IS_ONE
+ return ((a.high & 0x7fff) == 0x7fff)
+ && ((a.low << 1) >= 0x8000000000000000ULL);
+#else
uint64_t aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 );
@@ -842,6 +896,7 @@ int floatx80_is_signaling_nan( floatx80 a )
( ( a.high & 0x7FFF ) == 0x7FFF )
&& (uint64_t) ( aLow<<1 )
&& ( a.low == aLow );
+#endif
}
#endif
@@ -975,9 +1030,14 @@ int float128_is_signaling_nan(float128 a_)
int float128_is_quiet_nan( float128 a )
{
+#if SNAN_BIT_IS_ONE
+ return (((a.high >> 47) & 0xffff) == 0xfffe)
+ && (a.low || (a.high & 0x00007fffffffffffULL));
+#else
return
- ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
- && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
+ ((a.high << 1) >= 0xffff000000000000)
+ && (a.low || (a.high & 0x0000ffffffffffffULL));
+#endif
}
/*----------------------------------------------------------------------------
@@ -987,9 +1047,15 @@ int float128_is_quiet_nan( float128 a )
int float128_is_signaling_nan( float128 a )
{
+#if SNAN_BIT_IS_ONE
+ return
+ ((a.high << 1) >= 0xffff000000000000)
+ && (a.low || (a.high & 0x0000ffffffffffffULL));
+#else
return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
+#endif
}
#endif