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| author | Blue Swirl <blauwirbel@gmail.com> | 2012-04-09 16:50:52 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-05-01 10:45:04 +0000 |
| commit | 0cac1b66c88c4cd3ec1d358091486787837215a3 (patch) | |
| tree | 742ebbb3429ca1845a6d528e1acb35d1b2d7c744 /exec-all.h | |
| parent | e554861766d9ae84dd5720baa4869f4ed711506f (diff) | |
cputlb: move TLB handling to a separate file
Move TLB handling and softmmu code load helpers to cputlb.c,
compile only for softmmu targets.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'exec-all.h')
| -rw-r--r-- | exec-all.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/exec-all.h b/exec-all.h index 937d3cef01..c1b7e1f263 100644 --- a/exec-all.h +++ b/exec-all.h @@ -96,13 +96,22 @@ void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1); int page_unprotect(target_ulong address, uintptr_t pc, void *puc); void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, int is_cpu_write_access); +#if !defined(CONFIG_USER_ONLY) +/* cputlb.c */ void tlb_flush_page(CPUArchState *env, target_ulong addr); void tlb_flush(CPUArchState *env, int flush_global); -#if !defined(CONFIG_USER_ONLY) void tlb_set_page(CPUArchState *env, target_ulong vaddr, target_phys_addr_t paddr, int prot, int mmu_idx, target_ulong size); void tb_invalidate_phys_addr(target_phys_addr_t addr); +#else +static inline void tlb_flush_page(CPUArchState *env, target_ulong addr) +{ +} + +static inline void tlb_flush(CPUArchState *env, int flush_global) +{ +} #endif #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ @@ -340,6 +349,7 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong return addr; } #else +/* cputlb.c */ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); #endif |