diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-01-16 19:29:31 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-02-16 14:51:00 +0100 |
| commit | d77953b94ff20868b21796ee22ca57baa1cfc941 (patch) | |
| tree | c98997e02a8a096cb8a1e72220cc129117a11136 /cpu-exec.c | |
| parent | fcd7d0034b7eddba505a548f456f452bf5a7d56c (diff) | |
cpu: Move current_tb field to CPUState
Explictly NULL it on CPU reset since it was located before breakpoints.
Change vapic_report_tpr_access() argument to CPUState. This also
resolves the use of void* for cpu.h independence.
Change vAPIC patch_instruction() argument to X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index cf103f227b..9fcfe9e0db 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -32,7 +32,9 @@ bool qemu_cpu_has_work(CPUState *cpu) void cpu_loop_exit(CPUArchState *env) { - env->current_tb = NULL; + CPUState *cpu = ENV_GET_CPU(env); + + cpu->current_tb = NULL; longjmp(env->jmp_env, 1); } @@ -54,6 +56,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) static void cpu_exec_nocache(CPUArchState *env, int max_cycles, TranslationBlock *orig_tb) { + CPUState *cpu = ENV_GET_CPU(env); tcg_target_ulong next_tb; TranslationBlock *tb; @@ -64,10 +67,10 @@ static void cpu_exec_nocache(CPUArchState *env, int max_cycles, tb = tb_gen_code(env, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, max_cycles); - env->current_tb = tb; + cpu->current_tb = tb; /* execute the generated code */ next_tb = tcg_qemu_tb_exec(env, tb->tc_ptr); - env->current_tb = NULL; + cpu->current_tb = NULL; if ((next_tb & 3) == 2) { /* Restore PC. This may happen if async event occurs before @@ -589,7 +592,7 @@ int cpu_exec(CPUArchState *env) TB, but before it is linked into a potentially infinite loop and becomes env->current_tb. Avoid starting execution if there is a pending interrupt. */ - env->current_tb = tb; + cpu->current_tb = tb; barrier(); if (likely(!cpu->exit_request)) { tc_ptr = tb->tc_ptr; @@ -623,7 +626,7 @@ int cpu_exec(CPUArchState *env) } } } - env->current_tb = NULL; + cpu->current_tb = NULL; /* reset soft MMU for next block (it can currently only be set by a memory fault) */ } /* for(;;) */ |