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authorPeter Maydell <peter.maydell@linaro.org>2020-02-14 17:51:07 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-02-21 16:07:01 +0000
commit1548a7b2ad621a31b4216ed703b6d658a2ecf0d0 (patch)
tree70693a8be50a34e45787ac315d49d7a4112c4b18 /accel
parent4426d3617d64922d97b74ed22e67e33b6fb7de0a (diff)
target/arm: Read debug-related ID registers from KVM
Now we have isar_feature test functions that look at fields in the ID_AA64DFR0_EL1 and ID_DFR0 ID registers, add the code that reads these register values from KVM so that the checks behave correctly when we're using KVM. No isar_feature function tests ID_AA64DFR1_EL1 or DBGDIDR yet, but we add it to maintain the invariant that every field in the ARMISARegisters struct is populated for a KVM CPU and can be relied on. This requirement isn't actually written down yet, so add a note to the relevant comment. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200214175116.9164-13-peter.maydell@linaro.org
Diffstat (limited to 'accel')
0 files changed, 0 insertions, 0 deletions