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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-08-23 11:38:52 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-08-23 11:38:52 +0100 |
| commit | 152be6de9100e58b5d896272e951d4c910bd735a (patch) | |
| tree | 14921e4e322f04245debd096caad615418bd17ed /Makefile | |
| parent | d7df0ceee0fd2e512cd214a9074ebeeb40da3099 (diff) | |
| parent | 01c41d15de13104774d08e951db24815c8cffc79 (diff) | |
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200821-1' into staging
The first RISC-V PR for the 5.2 window.
This includes:
- NaNBox fixes
- Vector extension improvements
- a L2 cache controller
- PMP fixes
- Upgrade to OpenSBI v0.8 and the generic platform
- Fixes for the Ibex PLIC
# gpg: Signature made Sat 22 Aug 2020 06:38:18 BST
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-20200821-1:
hw/intc: ibex_plic: Honour source priorities
hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines
hw/intc: ibex_plic: Update the pending irqs
target/riscv: Change the TLB page size depends on PMP entries.
target/riscv: Fix the translation of physical address
gitlab-ci/opensbi: Update GitLab CI to build generic platform
hw/riscv: spike: Change the default bios to use generic platform image
hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u
roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware
roms/opensbi: Upgrade from v0.7 to v0.8
configure: Create symbolic links for pc-bios/*.elf files
riscv: Fix bug in setting pmpcfg CSR for RISCV64
hw/riscv: sifive_u: Add a dummy L2 cache controller device
target/riscv: check before allocating TCG temps
target/riscv: Clean up fmv.w.x
target/riscv: Check nanboxed inputs in trans_rvf.inc.c
target/riscv: Check nanboxed inputs to fp helpers
target/riscv: Generate nanboxed results from trans_rvf.inc.c
target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
target/riscv: Generate nanboxed results from fp helpers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -249,8 +249,8 @@ u-boot.e500 u-boot-sam460-20100605.bin \ qemu_vga.ndrv \ edk2-licenses.txt \ hppa-firmware.img \ -opensbi-riscv32-sifive_u-fw_jump.bin opensbi-riscv32-virt-fw_jump.bin \ -opensbi-riscv64-sifive_u-fw_jump.bin opensbi-riscv64-virt-fw_jump.bin +opensbi-riscv32-generic-fw_dynamic.bin opensbi-riscv64-generic-fw_dynamic.bin \ +opensbi-riscv32-generic-fw_dynamic.elf opensbi-riscv64-generic-fw_dynamic.elf else BLOBS= endif |