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authorPetar Jovanovic <petar.jovanovic@imgtec.com>2013-05-13 15:20:26 +0200
committerAurelien Jarno <aurelien@aurel32.net>2013-05-17 19:29:40 +0200
commit489ed4bbae309a6d897f6e037481c4c04f0737b5 (patch)
tree11a8633a968a3a51c2611b64b1e99a703d74d6ca
parent91b96cdc5befe56e7d9651189d0cbf06fc3f3902 (diff)
downloadqemu-arm-489ed4bbae309a6d897f6e037481c4c04f0737b5.tar.gz
target-mips: fix incorrect behaviour for EXTP
The mask for EXTP instruction when size=31 has not been correctly calculated. The test (mips32-dsp/extp.c) has been extended to include the case that triggers the issue. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-mips/dsp_helper.c3
-rw-r--r--tests/tcg/mips/mips32-dsp/extp.c18
2 files changed, 19 insertions, 2 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index 9212789b4e..a55f866581 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3415,8 +3415,7 @@ target_ulong helper_extp(target_ulong ac, target_ulong size, CPUMIPSState *env)
if (sub >= -1) {
acc = ((uint64_t)env->active_tc.HI[ac] << 32) |
((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
- temp = (acc >> (start_pos - size)) &
- (((uint32_t)0x01 << (size + 1)) - 1);
+ temp = (acc >> (start_pos - size)) & (~0U >> (31 - size));
set_DSPControl_efi(0, env);
} else {
set_DSPControl_efi(1, env);
diff --git a/tests/tcg/mips/mips32-dsp/extp.c b/tests/tcg/mips/mips32-dsp/extp.c
index 21a67af216..b18bdb34c8 100644
--- a/tests/tcg/mips/mips32-dsp/extp.c
+++ b/tests/tcg/mips/mips32-dsp/extp.c
@@ -40,5 +40,23 @@ int main()
dsp = (dsp >> 14) & 0x01;
assert(dsp == 1);
+ ach = 0;
+ acl = 0x80000001;
+ dsp = 0x1F;
+ result = 0x80000001;
+
+ __asm
+ ("wrdsp %1\n\t"
+ "mthi %2, $ac2\n\t"
+ "mtlo %3, $ac2\n\t"
+ "extp %0, $ac2, 0x1F\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rt), "+r"(dsp)
+ : "r"(ach), "r"(acl)
+ );
+ dsp = (dsp >> 14) & 0x01;
+ assert(dsp == 0);
+ assert(result == rt);
+
return 0;
}