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authorAlexander Graf <agraf@suse.de>2013-01-16 01:43:43 +0100
committerAlexander Graf <agraf@suse.de>2013-01-18 19:06:57 +0100
commit746a870b3c44a6c5734691fec013c78520d55f15 (patch)
treea4209ef63366d2c6e69dcdf7a80eabc3706018ef
parent528e536ea2fd3bfe8412e39a5623e80b254f3ae0 (diff)
downloadqemu-arm-746a870b3c44a6c5734691fec013c78520d55f15.tar.gz
PPC: Provide zero SVR for -cpu e500mc and e5500
Even though our -cpu types for e500mc and e5500 are no real CPUs that actually have version registers, a guest might still want to access said version register and that has to succeed for a guest to be happy. So let's expose a zero SVR value on E500_SVR SPR reads. Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--target-ppc/translate_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 3f199c4bb9..2d78529273 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8633,9 +8633,9 @@ static const ppc_def_t ppc_defs[] = {
POWERPC_DEF("e500v2_v22", CPU_POWERPC_e500v2_v22, e500v2),
/* PowerPC e500v2 v3.0 core */
POWERPC_DEF("e500v2_v30", CPU_POWERPC_e500v2_v30, e500v2),
- POWERPC_DEF("e500mc", CPU_POWERPC_e500mc, e500mc),
+ POWERPC_DEF_SVR("e500mc", CPU_POWERPC_e500mc, POWERPC_SVR_E500, e500mc),
#ifdef TARGET_PPC64
- POWERPC_DEF("e5500", CPU_POWERPC_e5500, e5500),
+ POWERPC_DEF_SVR("e5500", CPU_POWERPC_e5500, POWERPC_SVR_E500, e5500),
#endif
/* PowerPC e500 microcontrollers */
/* MPC8533 */