diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-04 11:34:50 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-04 14:58:31 +0100 |
commit | 37c4b0f36b6f04d27cbb9e63410b353492e4159b (patch) | |
tree | 1eadf8615a693852bd63dfd7689cc250352108be | |
parent | 9980bb9947b2e8b02be704024e7fd67d3dbf58ee (diff) |
target/arm: Convert VJCVT to decodetree
Convert the VJCVT instruction to decodetree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/arm/translate-vfp.inc.c | 24 | ||||
-rw-r--r-- | target/arm/translate.c | 12 | ||||
-rw-r--r-- | target/arm/vfp.decode | 4 |
3 files changed, 29 insertions, 11 deletions
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index feac206f88..1c37209a24 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -2412,3 +2412,27 @@ static bool trans_VCVT_int_dp(DisasContext *s, arg_VCVT_int_dp *a) tcg_temp_free_ptr(fpst); return true; } + +static bool trans_VJCVT(DisasContext *s, arg_VJCVT *a) +{ + TCGv_i32 vd; + TCGv_i64 vm; + + /* UNDEF accesses to D16-D31 if they don't exist. */ + if (!dc_isar_feature(aa32_fp_d32, s) && (a->vm & 0x10)) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + vm = tcg_temp_new_i64(); + vd = tcg_temp_new_i32(); + tcg_gen_ld_f64(vm, cpu_env, vfp_reg_offset(true, a->vm)); + gen_helper_vjcvt(vd, vm, cpu_env); + tcg_gen_st_f32(vd, cpu_env, vfp_reg_offset(false, a->vd)); + tcg_temp_free_i64(vm); + tcg_temp_free_i32(vd); + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index caaad08490..51b553ada1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3040,7 +3040,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) return 1; case 15: switch (rn) { - case 0 ... 17: + case 0 ... 19: /* Already handled by decodetree */ return 1; default: @@ -3075,13 +3075,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) rm_is_dp = false; break; - case 0x13: /* vjcvt */ - if (!dp || !dc_isar_feature(aa32_jscvt, s)) { - return 1; - } - rd_is_dp = false; - break; - default: return 1; } @@ -3167,9 +3160,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) switch (op) { case 15: /* extension space */ switch (rn) { - case 19: /* vjcvt */ - gen_helper_vjcvt(cpu_F0s, cpu_F0d, cpu_env); - break; case 20: /* fshto */ gen_vfp_shto(dp, 16 - rm, 0); break; diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 47798fb43f..2f0587e27e 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -208,3 +208,7 @@ VCVT_int_sp ---- 1110 1.11 1000 .... 1010 s:1 1.0 .... \ vd=%vd_sp vm=%vm_sp VCVT_int_dp ---- 1110 1.11 1000 .... 1011 s:1 1.0 .... \ vd=%vd_sp vm=%vm_sp + +# VJCVT is always dp to sp +VJCVT ---- 1110 1.11 1001 .... 1011 11.0 .... \ + vd=%vd_sp vm=%vm_dp |