diff options
| author | Luc Michel <luc.michel@amd.com> | 2023-10-17 21:44:22 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-10-27 15:27:06 +0100 |
| commit | df93de987f423a0ed918c425f5dbd9a25d3c6229 (patch) | |
| tree | 72a5b3124f44eba7a0ec14ad7b19a6f3f810c2ff | |
| parent | 71a082a3fa9845360224c66029eea8d972b8b8bd (diff) | |
hw/net/cadence_gem: enforce 32 bits variable size for CRCpull-target-arm-20231027
The CRC was stored in an unsigned variable in gem_receive. Change it for
a uint32_t to ensure we have the correct variable size here.
Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: sai.pavan.boddu@amd.com
Message-id: 20231017194422.4124691-12-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/net/cadence_gem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 06a101bfcd..5b989f5b52 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1105,7 +1105,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) if (FIELD_EX32(s->regs[R_NWCFG], NWCFG, FCS_REMOVE)) { rxbuf_ptr = (void *)buf; } else { - unsigned crc_val; + uint32_t crc_val; if (size > MAX_FRAME_SIZE - sizeof(crc_val)) { size = MAX_FRAME_SIZE - sizeof(crc_val); |