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authorMichael Davidsaver <mdavidsaver@gmail.com>2017-02-20 14:04:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-02-20 14:04:42 +0000
commit96e4cc46d063cecf1234cc8a6ba83c5ead1967be (patch)
treed2edc6a312d2c5ff0a847ed8ada151e30dcc40cc
parent13ce330688f3f2046f2321547af0de8360b25880 (diff)
downloadqemu-arm-96e4cc46d063cecf1234cc8a6ba83c5ead1967be.tar.gz
armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
The VECTCLRACTIVE and VECTRESET bits in the AIRCR are both documented as UNPREDICTABLE if you write a 1 to them when the processor is not halted in Debug state (ie stopped and under the control of an external JTAG debugger). Since we don't implement Debug state or emulated JTAG these bits are always UNPREDICTABLE for us. Instead of logging them as unimplemented we can simply log writes as guest errors and ignore them. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> [PMM: change extracted from another patch; commit message constructed from scratch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
-rw-r--r--hw/intc/armv7m_nvic.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 9336bca142..456480a3f2 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -716,10 +716,14 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value)
qemu_irq_pulse(s->sysresetreq);
}
if (value & 2) {
- qemu_log_mask(LOG_UNIMP, "VECTCLRACTIVE unimplemented\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Setting VECTCLRACTIVE when not in DEBUG mode "
+ "is UNPREDICTABLE\n");
}
if (value & 1) {
- qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Setting VECTRESET when not in DEBUG mode "
+ "is UNPREDICTABLE\n");
}
s->prigroup = extract32(value, 8, 3);
nvic_irq_update(s);