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authorNadav Amit <namit@cs.technion.ac.il>2015-04-02 02:58:36 +0300
committerPaolo Bonzini <pbonzini@redhat.com>2015-04-02 15:57:27 +0200
commit9cb11fd7539b5b787d8fb3834004804a58dd16ae (patch)
treecd20dde0af304c6401ec4002b2f4e828a7c66a80
parent420957a5982113416c5e442687de5e1ffaffeafc (diff)
downloadqemu-arm-9cb11fd7539b5b787d8fb3834004804a58dd16ae.tar.gz
target-i386: clear bsp bit when designating bsp
Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it changes the BSP bit. An additional fix is required for QEMU tcg to allow software to change the BSP bit. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Message-Id: <1427932716-11800-1-git-send-email-namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--hw/intc/apic_common.c8
-rw-r--r--include/hw/i386/apic.h2
-rw-r--r--target-i386/cpu.c4
3 files changed, 8 insertions, 6 deletions
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 0858b45943..042e960f42 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -215,14 +215,18 @@ void apic_init_reset(DeviceState *dev)
}
}
-void apic_designate_bsp(DeviceState *dev)
+void apic_designate_bsp(DeviceState *dev, bool bsp)
{
if (dev == NULL) {
return;
}
APICCommonState *s = APIC_COMMON(dev);
- s->apicbase |= MSR_IA32_APICBASE_BSP;
+ if (bsp) {
+ s->apicbase |= MSR_IA32_APICBASE_BSP;
+ } else {
+ s->apicbase &= ~MSR_IA32_APICBASE_BSP;
+ }
}
static void apic_reset_common(DeviceState *dev)
diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h
index 1d48e027c3..51eb6d3884 100644
--- a/include/hw/i386/apic.h
+++ b/include/hw/i386/apic.h
@@ -21,7 +21,7 @@ void apic_sipi(DeviceState *s);
void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
TPRAccess access);
void apic_poll_irq(DeviceState *d);
-void apic_designate_bsp(DeviceState *d);
+void apic_designate_bsp(DeviceState *d, bool bsp);
/* pc.c */
DeviceState *cpu_get_current_apic(void);
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b2d1c95df4..03b33cf3bd 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2714,9 +2714,7 @@ static void x86_cpu_reset(CPUState *s)
#if !defined(CONFIG_USER_ONLY)
/* We hard-wire the BSP to the first CPU. */
- if (s->cpu_index == 0) {
- apic_designate_bsp(cpu->apic_state);
- }
+ apic_designate_bsp(cpu->apic_state, s->cpu_index == 0);
s->halted = !cpu_is_bsp(cpu);