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authorPeter Maydell <peter.maydell@linaro.org>2021-01-11 11:21:01 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-02-15 14:10:06 +0000
commitdf7775d8fded76eb5363e63789187ffe6cd295a1 (patch)
treea35702a0b5fa08b775658b4129ba3c17c9df7cb5
parent1ccc5b92d15c025baa1e469531db8c2608dd748b (diff)
downloadqemu-arm-df7775d8fded76eb5363e63789187ffe6cd295a1.tar.gz
hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour
The SSE-300's iokit-sysctl device is similar to the SSE-200, but some registers have moved address or have different behaviours. In this commit we add case statements for the registers where the SSE-300 and SSE-200 have the same behaviour. Some registers are the same on all SSE versions and so need no code change at all. Putting both of these categories together covers: 0x0 SECDBGSTAT 0x4 SECDBGSET 0x8 SECDBGCLR 0xc SCSECCTRL 0x10 CLK_CFG0 -- this is like SSE-200 FCLK_DIV but with a different set of clocks being controlled; our implementation is a dummy reads-as-written anyway 0x14 CLK_CFG1 -- similar to SSE-200 SYSCLK_DIV; our implementation is a dummy 0x18 CLK_FORCE -- similar to SSE-200 but different bit allocations; we have a dummy implementation 0x100 RESET_SYNDROME -- bit allocation differs from SSE-200 but our implementation is a dummy 0x104 RESET_MASK -- bit allocation differs from SSE-200 but our implementation is a dummy 0x108 SWRESET 0x10c GRETREG 0x200 PDCM_PD_SYS_SENSE -- some bit allocations differ, but our implementation is a dummy We also need to migrate the state of these registers which are shared between the SSE-200 and SSE-300, so update the vmstate 'needed' function to do this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/misc/iotkit-sysctl.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index c67f5b320a..7f8608c814 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -105,6 +105,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->scsecctrl;
break;
default:
@@ -116,6 +117,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->fclk_div;
break;
default:
@@ -127,6 +129,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->sysclk_div;
break;
default:
@@ -138,6 +141,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->clock_force;
break;
default:
@@ -202,6 +206,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->pdcm_pd_sys_sense;
break;
default:
@@ -348,6 +353,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl SCSECCTRL unimplemented\n");
s->scsecctrl = value;
break;
@@ -360,6 +366,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl FCLK_DIV unimplemented\n");
s->fclk_div = value;
break;
@@ -372,6 +379,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl SYSCLK_DIV unimplemented\n");
s->sysclk_div = value;
break;
@@ -384,6 +392,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl CLOCK_FORCE unimplemented\n");
s->clock_force = value;
break;
@@ -420,6 +429,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP,
"IoTKit SysCtl PDCM_PD_SYS_SENSE unimplemented\n");
s->pdcm_pd_sys_sense = value;
@@ -569,7 +579,7 @@ static bool sse200_needed(void *opaque)
{
IoTKitSysCtl *s = IOTKIT_SYSCTL(opaque);
- return s->sse_version == ARMSSE_SSE200;
+ return s->sse_version != ARMSSE_IOTKIT;
}
static const VMStateDescription iotkit_sysctl_sse200_vmstate = {