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authorPeter Maydell <peter.maydell@linaro.org>2021-01-11 13:59:41 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-02-15 14:10:06 +0000
commitad1bd122e51681fc0fe84830150b1e5ee4299ffc (patch)
tree6dbc5cef8536c27040ad855e459b3842be5adacd
parente6a63bdd9db46ad556385d306bf1122971966fa1 (diff)
downloadqemu-arm-ad1bd122e51681fc0fe84830150b1e5ee4299ffc.tar.gz
hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300
The SSE-300 has only one CPU and so no INITSVTOR1. It does have INITSVTOR0, but unlike the SSE-200 this register now has a LOCK bit which can be set to 1 to prevent any further writes to the register. Implement these differences. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/misc/iotkit-sysctl.c26
1 files changed, 24 insertions, 2 deletions
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index 54004bebcb..ab97055f52 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -45,6 +45,7 @@ REG32(SWRESET, 0x108)
FIELD(SWRESET, SWRESETREQ, 9, 1)
REG32(GRETREG, 0x10c)
REG32(INITSVTOR0, 0x110)
+ FIELD(INITSVTOR0, LOCK, 0, 1)
REG32(INITSVTOR1, 0x114)
REG32(CPUWAIT, 0x118)
REG32(NMI_ENABLE, 0x11c) /* BUSWAIT in IoTKit */
@@ -167,6 +168,8 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset,
case ARMSSE_SSE200:
r = s->initsvtor1;
break;
+ case ARMSSE_SSE300:
+ goto bad_offset;
default:
g_assert_not_reached();
}
@@ -358,8 +361,25 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
s->gretreg = value;
break;
case A_INITSVTOR0:
- s->initsvtor0 = value;
- set_init_vtor(0, s->initsvtor0);
+ switch (s->sse_version) {
+ case ARMSSE_SSE300:
+ /* SSE300 has a LOCK bit which prevents further writes when set */
+ if (s->initsvtor0 & R_INITSVTOR0_LOCK_MASK) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "IoTKit INITSVTOR0 write when register locked\n");
+ break;
+ }
+ s->initsvtor0 = value;
+ set_init_vtor(0, s->initsvtor0 & ~R_INITSVTOR0_LOCK_MASK);
+ break;
+ case ARMSSE_IOTKIT:
+ case ARMSSE_SSE200:
+ s->initsvtor0 = value;
+ set_init_vtor(0, s->initsvtor0);
+ break;
+ default:
+ g_assert_not_reached();
+ }
break;
case A_CPUWAIT:
switch (s->sse_version) {
@@ -464,6 +484,8 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
s->initsvtor1 = value;
set_init_vtor(1, s->initsvtor1);
break;
+ case ARMSSE_SSE300:
+ goto bad_offset;
default:
g_assert_not_reached();
}