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authorLucien Murray-Pitts <lucienmp.qemu@gmail.com>2021-02-01 01:01:52 +0100
committerLaurent Vivier <laurent@vivier.eu>2021-02-11 21:10:01 +0100
commit5736526ce2da32205022b10dcdf9807e735e451a (patch)
treead0a021fed004a90a3a381082185873a8485019e
parent60d8e96453d090f71027f95e47e5ddbe17f670e3 (diff)
downloadqemu-arm-5736526ce2da32205022b10dcdf9807e735e451a.tar.gz
m68k: add missing BUSCR/PCR CR defines, and BUSCR/PCR/CAAR CR to m68k_move_to/from
The BUSCR/PCR CR defines were missing for 68060, and the move_to/from helper functions were also missing a decode for the 68060 M68K_CR_CAAR CR register. Added missing defines, and respective decodes for all three CR registers to the helpers. Although this patch defines them, the implementation is empty in this patch and these registers will result in a cpu abort - which is the default prior to this patch. This patch aims to reach full coverage of all CR registers within the helpers. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <19e5c0fa8baed6479ed0502fd3deb132d19457fb.1612137712.git.balaton@eik.bme.hu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
-rw-r--r--target/m68k/cpu.h4
-rw-r--r--target/m68k/helper.c10
2 files changed, 14 insertions, 0 deletions
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 2b1cdf241b..ae34c94615 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -393,6 +393,10 @@ typedef enum {
#define M68K_CR_DACR0 0x006
#define M68K_CR_DACR1 0x007
+/* MC68060 */
+#define M68K_CR_BUSCR 0x008
+#define M68K_CR_PCR 0x808
+
#define M68K_FPIAR_SHIFT 0
#define M68K_FPIAR (1 << M68K_FPIAR_SHIFT)
#define M68K_FPSR_SHIFT 1
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 9e81ee53ad..69acdc3b35 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -255,6 +255,11 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
case M68K_CR_DTT1:
env->mmu.ttr[M68K_DTTR1] = val;
return;
+ /* Unimplemented Registers */
+ case M68K_CR_CAAR:
+ case M68K_CR_PCR:
+ case M68K_CR_BUSCR:
+ break;
}
cpu_abort(env_cpu(env),
"Unimplemented control register write 0x%x = 0x%x\n",
@@ -309,6 +314,11 @@ uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg)
/* MC68040/MC68LC040 */
case M68K_CR_DTT1: /* MC68EC040 only: M68K_CR_DACR1 */
return env->mmu.ttr[M68K_DTTR1];
+ /* Unimplemented Registers */
+ case M68K_CR_CAAR:
+ case M68K_CR_PCR:
+ case M68K_CR_BUSCR:
+ break;
}
cpu_abort(env_cpu(env), "Unimplemented control register read 0x%x\n",
reg);