diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-11 14:26:47 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2021-02-15 14:10:06 +0000 |
commit | 397cb31b50e429f22de526c527234ff9d34cc6c8 (patch) | |
tree | 08eb1813170aba00fc7de32fd1b44af43b5d8979 | |
parent | 6d243cfe255e0af73b329cea0ccd1e08862b4ede (diff) |
hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers
The sysctl PDCM_PD_*_SENSE registers control various power domains in
the system and allow the guest to configure which conditions keep a
power domain awake and what power state to use when the domain is in
a low power state. QEMU doesn't model power domains, so for us these
registers are dummy reads-as-written implementations.
The SSE-300 has a different power domain setup, so the set of
registers is slightly different:
Offset SSE-200 SSE-300
---------------------------------------------------
0x200 PDCM_PD_SYS_SENSE PDCM_PD_SYS_SENSE
0x204 reserved PDCM_PD_CPU0_SENSE
0x208 reserved reserved
0x20c PDCM_PD_SRAM0_SENSE reserved
0x210 PDCM_PD_SRAM1_SENSE reserved
0x214 PDCM_PD_SRAM2_SENSE PDCM_PD_VMR0_SENSE
0x218 PDCM_PD_SRAM3_SENSE PDCM_PD_VMR1_SENSE
Offsets 0x200 and 0x208 are the same for both, so handled in a
previous commit; here we deal with 0x204, 0x20c, 0x210, 0x214, 0x218.
(We can safely add new lines to the SSE300 vmstate because no board
uses this device in an SSE300 yet.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | hw/misc/iotkit-sysctl.c | 61 | ||||
-rw-r--r-- | include/hw/misc/iotkit-sysctl.h | 3 |
2 files changed, 62 insertions, 2 deletions
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c index e8255d26b5..a80f68b799 100644 --- a/hw/misc/iotkit-sysctl.c +++ b/hw/misc/iotkit-sysctl.c @@ -55,10 +55,11 @@ REG32(PWRCTRL, 0x1fc) FIELD(PWRCTRL, PPU_ACCESS_UNLOCK, 0, 1) FIELD(PWRCTRL, PPU_ACCESS_FILTER, 1, 1) REG32(PDCM_PD_SYS_SENSE, 0x200) +REG32(PDCM_PD_CPU0_SENSE, 0x204) REG32(PDCM_PD_SRAM0_SENSE, 0x20c) REG32(PDCM_PD_SRAM1_SENSE, 0x210) -REG32(PDCM_PD_SRAM2_SENSE, 0x214) -REG32(PDCM_PD_SRAM3_SENSE, 0x218) +REG32(PDCM_PD_SRAM2_SENSE, 0x214) /* PDCM_PD_VMR0_SENSE on SSE300 */ +REG32(PDCM_PD_SRAM3_SENSE, 0x218) /* PDCM_PD_VMR1_SENSE on SSE300 */ REG32(PID4, 0xfd0) REG32(PID5, 0xfd4) REG32(PID6, 0xfd8) @@ -259,6 +260,18 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset, g_assert_not_reached(); } break; + case A_PDCM_PD_CPU0_SENSE: + switch (s->sse_version) { + case ARMSSE_IOTKIT: + case ARMSSE_SSE200: + goto bad_offset; + case ARMSSE_SSE300: + r = s->pdcm_pd_cpu0_sense; + break; + default: + g_assert_not_reached(); + } + break; case A_PDCM_PD_SRAM0_SENSE: switch (s->sse_version) { case ARMSSE_IOTKIT: @@ -266,6 +279,8 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset, case ARMSSE_SSE200: r = s->pdcm_pd_sram0_sense; break; + case ARMSSE_SSE300: + goto bad_offset; default: g_assert_not_reached(); } @@ -277,6 +292,8 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset, case ARMSSE_SSE200: r = s->pdcm_pd_sram1_sense; break; + case ARMSSE_SSE300: + goto bad_offset; default: g_assert_not_reached(); } @@ -288,6 +305,9 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset, case ARMSSE_SSE200: r = s->pdcm_pd_sram2_sense; break; + case ARMSSE_SSE300: + r = s->pdcm_pd_vmr0_sense; + break; default: g_assert_not_reached(); } @@ -299,6 +319,9 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr offset, case ARMSSE_SSE200: r = s->pdcm_pd_sram3_sense; break; + case ARMSSE_SSE300: + r = s->pdcm_pd_vmr1_sense; + break; default: g_assert_not_reached(); } @@ -553,6 +576,20 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset, g_assert_not_reached(); } break; + case A_PDCM_PD_CPU0_SENSE: + switch (s->sse_version) { + case ARMSSE_IOTKIT: + case ARMSSE_SSE200: + goto bad_offset; + case ARMSSE_SSE300: + qemu_log_mask(LOG_UNIMP, + "IoTKit SysCtl PDCM_PD_CPU0_SENSE unimplemented\n"); + s->pdcm_pd_cpu0_sense = value; + break; + default: + g_assert_not_reached(); + } + break; case A_PDCM_PD_SRAM0_SENSE: switch (s->sse_version) { case ARMSSE_IOTKIT: @@ -562,6 +599,8 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset, "IoTKit SysCtl PDCM_PD_SRAM0_SENSE unimplemented\n"); s->pdcm_pd_sram0_sense = value; break; + case ARMSSE_SSE300: + goto bad_offset; default: g_assert_not_reached(); } @@ -575,6 +614,8 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset, "IoTKit SysCtl PDCM_PD_SRAM1_SENSE unimplemented\n"); s->pdcm_pd_sram1_sense = value; break; + case ARMSSE_SSE300: + goto bad_offset; default: g_assert_not_reached(); } @@ -588,6 +629,11 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset, "IoTKit SysCtl PDCM_PD_SRAM2_SENSE unimplemented\n"); s->pdcm_pd_sram2_sense = value; break; + case ARMSSE_SSE300: + qemu_log_mask(LOG_UNIMP, + "IoTKit SysCtl PDCM_PD_VMR0_SENSE unimplemented\n"); + s->pdcm_pd_vmr0_sense = value; + break; default: g_assert_not_reached(); } @@ -601,6 +647,11 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset, "IoTKit SysCtl PDCM_PD_SRAM3_SENSE unimplemented\n"); s->pdcm_pd_sram3_sense = value; break; + case ARMSSE_SSE300: + qemu_log_mask(LOG_UNIMP, + "IoTKit SysCtl PDCM_PD_VMR1_SENSE unimplemented\n"); + s->pdcm_pd_vmr1_sense = value; + break; default: g_assert_not_reached(); } @@ -672,6 +723,9 @@ static void iotkit_sysctl_reset(DeviceState *dev) s->pdcm_pd_sram1_sense = 0; s->pdcm_pd_sram2_sense = 0; s->pdcm_pd_sram3_sense = 0; + s->pdcm_pd_cpu0_sense = 0; + s->pdcm_pd_vmr0_sense = 0; + s->pdcm_pd_vmr1_sense = 0; } static void iotkit_sysctl_init(Object *obj) @@ -708,6 +762,9 @@ static const VMStateDescription iotkit_sysctl_sse300_vmstate = { .needed = sse300_needed, .fields = (VMStateField[]) { VMSTATE_UINT32(pwrctrl, IoTKitSysCtl), + VMSTATE_UINT32(pdcm_pd_cpu0_sense, IoTKitSysCtl), + VMSTATE_UINT32(pdcm_pd_vmr0_sense, IoTKitSysCtl), + VMSTATE_UINT32(pdcm_pd_vmr1_sense, IoTKitSysCtl), VMSTATE_END_OF_LIST() } }; diff --git a/include/hw/misc/iotkit-sysctl.h b/include/hw/misc/iotkit-sysctl.h index 8859b15d73..481e27f4db 100644 --- a/include/hw/misc/iotkit-sysctl.h +++ b/include/hw/misc/iotkit-sysctl.h @@ -59,6 +59,9 @@ struct IoTKitSysCtl { uint32_t pdcm_pd_sram1_sense; uint32_t pdcm_pd_sram2_sense; uint32_t pdcm_pd_sram3_sense; + uint32_t pdcm_pd_cpu0_sense; + uint32_t pdcm_pd_vmr0_sense; + uint32_t pdcm_pd_vmr1_sense; /* Properties */ uint32_t sse_version; |