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authorPeter Maydell <peter.maydell@linaro.org>2014-11-24 15:47:12 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-11-24 18:10:19 +0000
commit25cbb61cdc180a441758b10eb7dd74002de01f68 (patch)
treef954c1605d423244ff47ff4f982b8ea0b8289fa3
parent17cf6bcca48ada54dede92d3d68af0b510fb68e2 (diff)
downloadqemu-arm-25cbb61cdc180a441758b10eb7dd74002de01f68.tar.gz
softfloat: Implement uint64_to_float64() and uint64_to_float32()
Reimplement from scratch the uint64_to_float64() and uint64_to_float32() conversion functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--fpu/softfloat.c47
-rw-r--r--include/fpu/softfloat.h2
2 files changed, 49 insertions, 0 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index f79669fce2..3ab75a34bc 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1302,6 +1302,35 @@ float32 int64_to_float32(int64_t a STATUS_PARAM)
}
+float32 uint64_to_float32(uint64_t a STATUS_PARAM)
+{
+ int shiftcount;
+
+ if (a == 0) {
+ return float32_zero;
+ }
+
+ /* Determine (left) shift needed to put first set bit into bit posn 23
+ * (since packFloat32() expects the binary point between bits 23 and 22);
+ * this is the fast case for smallish numbers.
+ */
+ shiftcount = countLeadingZeros64(a) - 40;
+ if (shiftcount >= 0) {
+ return packFloat32(0, 0x95 - shiftcount, a << shiftcount);
+ }
+ /* Otherwise we need to do a round-and-pack. roundAndPackFloat32()
+ * expects the binary point between bits 30 and 29, hence the + 7.
+ */
+ shiftcount += 7;
+ if (shiftcount < 0) {
+ shift64RightJamming(a, -shiftcount, &a);
+ } else {
+ a <<= shiftcount;
+ }
+
+ return roundAndPackFloat32(0, 0x9c - shiftcount, a STATUS_VAR);
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a'
| to the double-precision floating-point format. The conversion is performed
@@ -1321,6 +1350,24 @@ float64 int64_to_float64(int64_t a STATUS_PARAM)
}
+float64 uint64_to_float64(uint64_t a STATUS_PARAM)
+{
+ int exp = 0x43C;
+ int shiftcount;
+
+ if (a == 0) {
+ return float64_zero;
+ }
+
+ shiftcount = countLeadingZeros64(a) - 1;
+ if (shiftcount < 0) {
+ shift64RightJamming(a, -shiftcount, &a);
+ } else {
+ a <<= shiftcount;
+ }
+ return roundAndPackFloat64(0, exp - shiftcount, a STATUS_VAR);
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a'
| to the extended double-precision floating-point format. The conversion
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 772f9a11f1..50c2fec8c4 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -274,6 +274,8 @@ floatx80 int32_to_floatx80(int32_t STATUS_PARAM);
float128 int32_to_float128(int32_t STATUS_PARAM);
float32 int64_to_float32(int64_t STATUS_PARAM);
float64 int64_to_float64(int64_t STATUS_PARAM);
+float32 uint64_to_float32(uint64_t STATUS_PARAM);
+float64 uint64_to_float64(uint64_t STATUS_PARAM);
floatx80 int64_to_floatx80(int64_t STATUS_PARAM);
float128 int64_to_float128(int64_t STATUS_PARAM);
float128 uint64_to_float128(uint64_t STATUS_PARAM);