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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-25 21:54:59 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-25 21:54:59 +0000
commit2a4188a38fa3a91a9286da6fe077b6218378504d (patch)
tree487279a8765bd844f1fe5c83672e5c3807da0cbd
parent4f4fbf77ade902f929959b0e10fbf7e56bb85816 (diff)
low level support for memory mapped flash devices (initial patch by Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2020 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--cpu-all.h4
-rw-r--r--exec-all.h2
-rw-r--r--exec.c17
3 files changed, 16 insertions, 7 deletions
diff --git a/cpu-all.h b/cpu-all.h
index ac65043d5a..6d6eb1a4cc 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -828,6 +828,10 @@ extern uint8_t *phys_ram_dirty;
#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
+/* acts like a ROM when read and like a device when written. As an
+ exception, the write memory callback gets the ram offset instead of
+ the physical address */
+#define IO_MEM_ROMD (1)
typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
diff --git a/exec-all.h b/exec-all.h
index bc91f71ca1..b598948e36 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -570,7 +570,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
ldub_code(addr);
}
pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;
- if (pd > IO_MEM_ROM) {
+ if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);
}
return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;
diff --git a/exec.c b/exec.c
index f900e09f00..7e6f96688d 100644
--- a/exec.c
+++ b/exec.c
@@ -1488,7 +1488,7 @@ int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
if (is_softmmu)
#endif
{
- if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
+ if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
/* IO memory case */
address = vaddr | pd;
addend = paddr;
@@ -1785,7 +1785,8 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
p->phys_offset = phys_offset;
- if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)
+ if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
+ (phys_offset & IO_MEM_ROMD))
phys_offset += TARGET_PAGE_SIZE;
}
}
@@ -2048,7 +2049,8 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
}
}
} else {
- if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
+ if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
+ !(pd & IO_MEM_ROMD)) {
/* I/O case */
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
if (l >= 4 && ((addr & 3) == 0)) {
@@ -2103,7 +2105,8 @@ void cpu_physical_memory_write_rom(target_phys_addr_t addr,
}
if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&
- (pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM) {
+ (pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM &&
+ !(pd & IO_MEM_ROMD)) {
/* do nothing */
} else {
unsigned long addr1;
@@ -2135,7 +2138,8 @@ uint32_t ldl_phys(target_phys_addr_t addr)
pd = p->phys_offset;
}
- if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
+ if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
+ !(pd & IO_MEM_ROMD)) {
/* I/O case */
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);
@@ -2164,7 +2168,8 @@ uint64_t ldq_phys(target_phys_addr_t addr)
pd = p->phys_offset;
}
- if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
+ if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
+ !(pd & IO_MEM_ROMD)) {
/* I/O case */
io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
#ifdef TARGET_WORDS_BIGENDIAN