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authorPeter Maydell <peter.maydell@linaro.org>2014-05-22 17:05:36 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-22 17:05:36 +0100
commit5118dc5975e6aa2e823961e15b162919f94721cc (patch)
tree73d24b76ff3e274f4e55646ff184512d362b0eb8
parent45e66b7beb275bd1f8c4e56fe97dfb88b35345d0 (diff)
parentb1fe60cd3525871a4c593ad8c2b39b89c19c00d0 (diff)
downloadqemu-arm-5118dc5975e6aa2e823961e15b162919f94721cc.tar.gz
Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-5' into staging
audio: two intel-hda fixes. # gpg: Signature made Wed 21 May 2014 09:49:39 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-audio-5: hw/audio/intel-hda: Avoid shift into sign bit audio/intel-hda: support FIFORDY Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/audio/intel-hda.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index d41f82cec4..3cfb66c5d8 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -245,7 +245,7 @@ static void intel_hda_update_int_sts(IntelHDAState *d)
/* update global status */
if (sts & d->int_ctl) {
- sts |= (1 << 31);
+ sts |= (1U << 31);
}
d->int_sts = sts;
@@ -257,7 +257,7 @@ static void intel_hda_update_irq(IntelHDAState *d)
int level;
intel_hda_update_int_sts(d);
- if (d->int_sts & (1 << 31) && d->int_ctl & (1 << 31)) {
+ if (d->int_sts & (1U << 31) && d->int_ctl & (1U << 31)) {
level = 1;
} else {
level = 0;
@@ -574,7 +574,7 @@ static void intel_hda_set_st_ctl(IntelHDAState *d, const IntelHDAReg *reg, uint3
if (st->ctl & 0x01) {
/* reset */
dprint(d, 1, "st #%d: reset\n", reg->stream);
- st->ctl = 0;
+ st->ctl = SD_STS_FIFO_READY << 24;
}
if ((st->ctl & 0x02) != (old & 0x02)) {
uint32_t stnr = (st->ctl >> 20) & 0x0f;
@@ -829,6 +829,7 @@ static const struct IntelHDAReg regtab[] = {
.wclear = 0x1c000000, \
.offset = offsetof(IntelHDAState, st[_i].ctl), \
.whandler = intel_hda_set_st_ctl, \
+ .reset = SD_STS_FIFO_READY << 24 \
}, \
[ ST_REG(_i, ICH6_REG_SD_LPIB) ] = { \
.stream = _i, \