aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2022-04-30 22:50:15 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-05-05 09:35:52 +0100
commit25e168ab70627bf3368944cf5b1d97490c853007 (patch)
tree3385b58388986d08a4c4243fda0f6c8eb5363ebb
parentca56aac59f6ca936b60f7f6bea5ab54e3f70e379 (diff)
target/arm: Add isar_feature_{aa64,any}_ras
Add the aa64 predicate for detecting RAS support from id registers. We already have the aa32 version from the M-profile work. Add the 'any' predicate for testing both aa64 and aa32. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220501055028.646596-34-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/cpu.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7303103016..ca01f909a8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3886,6 +3886,11 @@ static inline bool isar_feature_aa64_aa32_el1(const ARMISARegisters *id)
return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, EL1) >= 2;
}
+static inline bool isar_feature_aa64_ras(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, RAS) != 0;
+}
+
static inline bool isar_feature_aa64_sve(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, SVE) != 0;
@@ -4108,6 +4113,11 @@ static inline bool isar_feature_any_debugv8p2(const ARMISARegisters *id)
return isar_feature_aa64_debugv8p2(id) || isar_feature_aa32_debugv8p2(id);
}
+static inline bool isar_feature_any_ras(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_ras(id) || isar_feature_aa32_ras(id);
+}
+
/*
* Forward to the above feature tests given an ARMCPU pointer.
*/