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authorPeter Maydell <peter.maydell@linaro.org>2012-07-04 11:18:43 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-07-25 13:33:11 +0100
commit62b7d74a174e995283fae63f3969576b4f55d2ec (patch)
tree322029283bfd4c4a90206a7628123a774b70fabd
parent11aef512c686a953edf09d05ea49736486372b75 (diff)
downloadqemu-arm-62b7d74a174e995283fae63f3969576b4f55d2ec.tar.gz
serial: reset lsr dr/thre upon fcr rfr/xfr
Includes: further fix serial.c fifo clear when receive fifo is requested to be cleared and there is a received byte pending to be read, accept the byte while discarding it so it will not stay pending. yet another serial tweak ...so needs review! Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
-rw-r--r--hw/serial.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/serial.c b/hw/serial.c
index 4a8226415a..d3d45bf28c 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -434,10 +434,17 @@ static void serial_ioport_write(void *opaque, uint32_t addr, uint32_t val)
qemu_del_timer(s->fifo_timeout_timer);
s->timeout_ipending=0;
fifo_clear(s,RECV_FIFO);
+ if ((s->lsr & UART_LSR_DR)) {
+ s->lsr &= ~(UART_LSR_DR | UART_LSR_BI | UART_LSR_OE);
+ if (!(s->mcr & UART_MCR_LOOP)) {
+ qemu_chr_accept_input(s->chr);
+ }
+ }
}
if (val & UART_FCR_XFR) {
fifo_clear(s,XMIT_FIFO);
+ s->lsr |= UART_LSR_THRE;
}
if (val & UART_FCR_FE) {