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authorRichard Henderson <richard.henderson@linaro.org>2022-06-08 19:38:55 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-06-08 19:38:55 +0100
commit19668718ad188e1b6a162bb52357a67fd407c96c (patch)
tree61a32da20e7fee4b5d1bf064b8d9e5de7853c95e
parent397d922c6248509c6d490f82088f00cbc716287c (diff)
target/arm: Add el_is_in_host
This (newish) ARM pseudocode function is easier to work with than open-coded tests for HCR_E2H etc. Use of the function will be staged into the code base in parts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220607203306.657998-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/helper.c28
-rw-r--r--target/arm/internals.h2
2 files changed, 30 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4f4044c688..322508170e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5282,6 +5282,34 @@ uint64_t arm_hcr_el2_eff(CPUARMState *env)
return ret;
}
+/*
+ * Corresponds to ARM pseudocode function ELIsInHost().
+ */
+bool el_is_in_host(CPUARMState *env, int el)
+{
+ uint64_t mask;
+
+ /*
+ * Since we only care about E2H and TGE, we can skip arm_hcr_el2_eff().
+ * Perform the simplest bit tests first, and validate EL2 afterward.
+ */
+ if (el & 1) {
+ return false; /* EL1 or EL3 */
+ }
+
+ /*
+ * Note that hcr_write() checks isar_feature_aa64_vh(),
+ * aka HaveVirtHostExt(), in allowing HCR_E2H to be set.
+ */
+ mask = el ? HCR_E2H : HCR_E2H | HCR_TGE;
+ if ((env->cp15.hcr_el2 & mask) != mask) {
+ return false;
+ }
+
+ /* TGE and/or E2H set: double check those bits are currently legal. */
+ return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2);
+}
+
static void hcrx_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 1d83146d56..ceaddcbfd6 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1347,6 +1347,8 @@ static inline void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu) { }
void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu);
#endif
+bool el_is_in_host(CPUARMState *env, int el);
+
void aa32_max_features(ARMCPU *cpu);
#endif