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authorRichard Henderson <richard.henderson@linaro.org>2022-06-08 19:38:59 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-06-08 19:38:59 +0100
commitf305bf9436896b4cd9ef622034e166b024780874 (patch)
tree8de9ebbdbe0d18813cd03d5ac993ade9df4a0f79
parent72db2aa353a98bd3486c9e5ef7e31ae7cf934849 (diff)
downloadqemu-arm-f305bf9436896b4cd9ef622034e166b024780874.tar.gz
target/arm: Add isar_feature_aa64_sme
This will be used for implementing FEAT_SME. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220607203306.657998-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e45b5cb7fe..2e6153c540 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -4048,6 +4048,11 @@ static inline bool isar_feature_aa64_mte(const ARMISARegisters *id)
return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, MTE) >= 2;
}
+static inline bool isar_feature_aa64_sme(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, SME) != 0;
+}
+
static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 4 &&