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authorRichard Henderson <richard.henderson@linaro.org>2022-05-27 11:19:07 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-05-30 17:05:12 +0100
commitb1071174d2a2ab371082b7d4b5f19e98edc61ac6 (patch)
tree2f196ec28189375f477ec3b50cc6524e3943dbba
parent1402a6b88f8d7ec0591427d8e8221c6d18d16d9b (diff)
downloadqemu-arm-pull-target-arm-20220530.tar.gz
target/arm: Remove aa64_sve check from before disas_svepull-target-arm-20220530
We now have individual checks on all insns within disas_sve. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-115-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/translate-a64.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index f502545307..935e1929bb 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14772,7 +14772,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
unallocated_encoding(s);
break;
case 0x2:
- if (!dc_isar_feature(aa64_sve, s) || !disas_sve(s, insn)) {
+ if (!disas_sve(s, insn)) {
unallocated_encoding(s);
}
break;