diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-25 14:41:06 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-25 14:41:06 +0000 |
| commit | c7ca3ad5e756e263daf082c315e311593ccec3d1 (patch) | |
| tree | 50d667523c605c051155410866c81213b9962e57 | |
| parent | 6222c3acc4f36fc31d057e1afb6b5c408f83d343 (diff) | |
hw/intc/arm_gicv3_its: Add missing newlines to process_mapc() loggingpull-target-arm-20220325
In commit 84d43d2e82da we rearranged the logging of errors in
process_mapc(), and inadvertently dropped the trailing newlines
from the log messages. Restore them. The same commit also
attempted to switch the ICID printing to hex (which is how we
print ICIDs elsewhere) but only did half the job, adding the
0x prefix but leaving the format string at %d; correct to %x.
Fixes: 84d43d2e82da ("hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| -rw-r--r-- | hw/intc/arm_gicv3_its.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index b96b874afd..8746673213 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -524,12 +524,12 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, const uint64_t *cmdpkt) trace_gicv3_its_cmd_mapc(icid, cte.rdbase, cte.valid); if (icid >= s->ct.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%d", icid); + qemu_log_mask(LOG_GUEST_ERROR, "ITS MAPC: invalid ICID 0x%x\n", icid); return CMD_CONTINUE; } if (cte.valid && cte.rdbase >= s->gicv3->num_cpu) { qemu_log_mask(LOG_GUEST_ERROR, - "ITS MAPC: invalid RDBASE %u ", cte.rdbase); + "ITS MAPC: invalid RDBASE %u\n", cte.rdbase); return CMD_CONTINUE; } |