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authorPeter Maydell <peter.maydell@linaro.org>2020-08-03 12:18:49 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-08-24 10:15:11 +0100
commitce51c7f522ca488c795c3510413e338021141c96 (patch)
tree7064371ef13962fc0b618229bf71fa32d923cd01
parent4c498dcfd84281f20bd55072630027d1b3c115fd (diff)
downloadqemu-arm-ce51c7f522ca488c795c3510413e338021141c96.tar.gz
target/arm: Remove ARCH macro
The ARCH() macro was used a lot in the legacy decoder, but there are now just two uses of it left. Since a macro which expands out to a goto is liable to be confusing when reading code, replace the last two uses with a simple open-coded qeuivalent. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200803111849.13368-8-peter.maydell@linaro.org
-rw-r--r--target/arm/translate.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index e2ae4f7944..b74a4350e3 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -49,8 +49,6 @@
#define ENABLE_ARCH_7 arm_dc_feature(s, ARM_FEATURE_V7)
#define ENABLE_ARCH_8 arm_dc_feature(s, ARM_FEATURE_V8)
-#define ARCH(x) do { if (!ENABLE_ARCH_##x) goto illegal_op; } while(0)
-
#include "translate.h"
#if defined(CONFIG_USER_ONLY)
@@ -7909,7 +7907,7 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)
{
TCGv_i32 tmp;
- /* For A32, ARCH(5) is checked near the start of the uncond block. */
+ /* For A32, ARM_FEATURE_V5 is checked near the start of the uncond block. */
if (s->thumb && (a->imm & 2)) {
return false;
}
@@ -8275,7 +8273,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
* choose to UNDEF. In ARMv5 and above the space is used
* for miscellaneous unconditional instructions.
*/
- ARCH(5);
+ if (!arm_dc_feature(s, ARM_FEATURE_V5)) {
+ unallocated_encoding(s);
+ return;
+ }
/* Unconditional instructions. */
/* TODO: Perhaps merge these into one decodetree output file. */
@@ -8400,7 +8401,10 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
goto illegal_op;
}
} else if ((insn & 0xf800e800) != 0xf000e800) {
- ARCH(6T2);
+ if (!arm_dc_feature(s, ARM_FEATURE_THUMB2)) {
+ unallocated_encoding(s);
+ return;
+ }
}
if (arm_dc_feature(s, ARM_FEATURE_M)) {