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authorRichard Henderson <richard.henderson@linaro.org>2019-10-23 11:00:42 -0400
committerPeter Maydell <peter.maydell@linaro.org>2019-10-24 17:16:27 +0100
commitbbad7c62d461a013100cc6403c0d21c3cca29fbe (patch)
tree89cc74df741a9b1d5e134b16a5313ef8b8b1e4f1
parent83f4baef3e2390b2764da80c0563e07ac75735e3 (diff)
downloadqemu-arm-bbad7c62d461a013100cc6403c0d21c3cca29fbe.tar.gz
target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
We do not need to compute any of these values for M-profile. Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two sets must be mutually exclusive. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191023150057.25731-10-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/helper.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ddd21edfcf..e2a62cf19a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
} else {
flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
+
+ /*
+ * Note that XSCALE_CPAR shares bits with VECSTRIDE.
+ * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
+ */
+ if (arm_feature(env, ARM_FEATURE_XSCALE)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32,
+ XSCALE_CPAR, env->cp15.c15_cpar);
+ } else {
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN,
+ env->vfp.vec_len);
+ flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
+ env->vfp.vec_stride);
+ }
}
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
- flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
|| arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
}
- /* Note that XSCALE_CPAR shares bits with VECSTRIDE */
- if (arm_feature(env, ARM_FEATURE_XSCALE)) {
- flags = FIELD_DP32(flags, TBFLAG_A32,
- XSCALE_CPAR, env->cp15.c15_cpar);
- }
}
/* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine