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authorPeter Maydell <peter.maydell@linaro.org>2018-09-25 14:02:33 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-09-25 14:14:07 +0100
commit4a87106b160a3e72152443065fb92f8a1313c23d (patch)
treec81c686c5a7f324669a8d196c7c3a636e05f5ba3
parentf02bb68f308936c4dc709df3aae43cc5ccfdc48d (diff)
downloadqemu-arm-pull-target-arm-20180925.tar.gz
target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp modepull-target-arm-20180925
The ARMv8 architecture defines that an AArch32 CPU starts in SVC mode, unless EL2 is the highest available EL, in which case it starts in Hyp mode. (In ARMv7 a CPU with EL2 but not EL3 was not a valid configuration, but we don't specifically reject this if the user asks for one.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20180823135047.16525-1-peter.maydell@linaro.org
-rw-r--r--target/arm/cpu.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 258ba6dcaa..b5e61cc177 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -199,8 +199,18 @@ static void arm_cpu_reset(CPUState *s)
env->cp15.c15_cpar = 1;
}
#else
- /* SVC mode with interrupts disabled. */
- env->uncached_cpsr = ARM_CPU_MODE_SVC;
+
+ /*
+ * If the highest available EL is EL2, AArch32 will start in Hyp
+ * mode; otherwise it starts in SVC. Note that if we start in
+ * AArch64 then these values in the uncached_cpsr will be ignored.
+ */
+ if (arm_feature(env, ARM_FEATURE_EL2) &&
+ !arm_feature(env, ARM_FEATURE_EL3)) {
+ env->uncached_cpsr = ARM_CPU_MODE_HYP;
+ } else {
+ env->uncached_cpsr = ARM_CPU_MODE_SVC;
+ }
env->daif = PSTATE_D | PSTATE_A | PSTATE_I | PSTATE_F;
if (arm_feature(env, ARM_FEATURE_M)) {