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authorPeter Maydell <peter.maydell@linaro.org>2018-08-24 10:22:44 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-08-24 10:22:44 +0100
commit30a719e3cb5c5367f3651eba8fa935634bfee286 (patch)
treec8ecc63f815a86999bca32178c0c1ec2850b5da0
parentf7be329a42c9003fa36224e54c64fccae331c807 (diff)
downloadqemu-arm-30a719e3cb5c5367f3651eba8fa935634bfee286.tar.gz
hw/arm/mps2: Fix ID register errors on AN511 and AN385pull-target-arm-20180824
Fix MPS2 SCC config register values for the mps2-an511 and mps2-an385 boards: * the SCC_AID bits [23:20] specify the FPGA build target board revision, and the SCC_CFG4 register specifies the actual board revision, so these should have matching values. Claim to be board revision C, consistently -- we had the revision in the wrong part of SCC_AID. * SCC_ID bits [15:4] should be the board number in hex, not decimal Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180823175225.22612-1-peter.maydell@linaro.org
-rw-r--r--hw/arm/mps2.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 564624629d..e3d698ba6c 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -312,7 +312,7 @@ static void mps2_common_init(MachineState *machine)
sccdev = DEVICE(&mms->scc);
qdev_set_parent_bus(sccdev, sysbus_get_default());
qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2);
- qdev_prop_set_uint32(sccdev, "scc-aid", 0x02000008);
+ qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008);
qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id);
object_property_set_bool(OBJECT(&mms->scc), true, "realized",
&error_fatal);
@@ -347,7 +347,7 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data)
mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3";
mmc->fpga_type = FPGA_AN385;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
- mmc->scc_id = 0x41040000 | (385 << 4);
+ mmc->scc_id = 0x41043850;
}
static void mps2_an511_class_init(ObjectClass *oc, void *data)
@@ -358,7 +358,7 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data)
mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3";
mmc->fpga_type = FPGA_AN511;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
- mmc->scc_id = 0x4104000 | (511 << 4);
+ mmc->scc_id = 0x41045110;
}
static const TypeInfo mps2_info = {