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authorPeter Maydell <peter.maydell@linaro.org>2018-08-24 10:22:41 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-08-24 10:22:41 +0100
commit0213f7ca0226690df44ecba68dcc4d7da8f0c2a3 (patch)
tree8150458179823b678ab02c5438d4b2c4ed5bd9b7
parent5b3d96b34482b8379f0f4a69f4e06c6dd05a584c (diff)
hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ
Connect the VIRQ and VFIQ lines from the GIC to the CPU; these exist always for both CPU and GIC whether the virtualization extensions are enabled or not, so we can just unconditionally connect them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180821132811.17675-6-peter.maydell@linaro.org
-rw-r--r--hw/arm/fsl-imx6ul.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 258f470623..4b56bfa8d1 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -207,6 +207,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
irq = qdev_get_gpio_in(d, ARM_CPU_IRQ);
sysbus_connect_irq(sbd, i, irq);
sysbus_connect_irq(sbd, i + smp_cpus, qdev_get_gpio_in(d, ARM_CPU_FIQ));
+ sysbus_connect_irq(sbd, i + 2 * smp_cpus,
+ qdev_get_gpio_in(d, ARM_CPU_VIRQ));
+ sysbus_connect_irq(sbd, i + 3 * smp_cpus,
+ qdev_get_gpio_in(d, ARM_CPU_VFIQ));
}
/*