diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:57 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:44:45 +0000 |
| commit | 3b32140e706b586a0b17050f99ffc812c8849bd0 (patch) | |
| tree | 309cae4a89efc1462f9830bae6a0a4f8d3a87f5e | |
| parent | bde0e60be4f0d1bef6dfb8fea102d42cf98a1bff (diff) | |
target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry
We already print various lines of information when we take an
exception, including the ELR and (if relevant) the FAR. Now
that FEAT_NV means that we might report something other than
the old PSTATE to the guest as the SPSR, it's worth logging
this as well.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
| -rw-r--r-- | target/arm/helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 4550ff7ffd..dc8f14f433 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11416,6 +11416,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) } env->banked_spsr[aarch64_banked_spsr_index(new_el)] = old_mode; + qemu_log_mask(CPU_LOG_INT, "...with SPSR 0x%x\n", old_mode); qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n", env->elr_el[new_el]); |