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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:49 +0100 |
| commit | ae52a5fa089d374766cd510bc6ba24ebf87a1f0b (patch) | |
| tree | bf8bc2184a381f16912e2d1ba6cc128518592501 | |
| parent | 28ff3e605dd1584e20c08a7cbb3272ef5e90df77 (diff) | |
target-arm: Make Cortex-A15 CBAR read-only
The Cortex-A15's CBAR register is actually read-only (unlike that
of the Cortex-A9). Correct our model to match the hardware.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
| -rw-r--r-- | target-arm/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index f9f61870b0..c0ddc3e3df 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -744,7 +744,7 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_ARM_DIV); set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); - set_feature(&cpu->env, ARM_FEATURE_CBAR); + set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); set_feature(&cpu->env, ARM_FEATURE_LPAE); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; cpu->midr = 0x412fc0f1; |