diff options
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2014-03-31 21:31:09 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 10:58:03 +0100 |
| commit | 9508c629aaf3e9c558dcd6e15a42b930998befbc (patch) | |
| tree | a07057e10716e92983b4b7a4394fb2d15f6536a0 | |
| parent | 264cec9f0f44955677034ef9b396379973737b22 (diff) | |
timer: cadence_ttc: Fix match register write logic
This switch logic should not fall through. Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 74147b4c017c904364955cc73107f90e6ac8ba74.1396326389.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/timer/cadence_ttc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index a279bced78..28cb328f9b 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -346,11 +346,13 @@ static void cadence_ttc_write(void *opaque, hwaddr offset, case 0x34: case 0x38: s->reg_match[0] = value & 0xffff; + break; case 0x3c: /* match register */ case 0x40: case 0x44: s->reg_match[1] = value & 0xffff; + break; case 0x48: /* match register */ case 0x4c: |