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authorMans Rullgard <mans@mansr.com>2013-07-15 14:35:25 +0100
committerPeter Maydell <peter.maydell@linaro.org>2013-07-15 14:35:25 +0100
commit7669a4122a615516a8887fbbd096c46b6eda7202 (patch)
tree2a57b9ee56424ea5a631ddb06cd749a8aef7d575
parent1c3845435dd65d0ae90d959f63ee49f92e98c064 (diff)
downloadqemu-arm-7669a4122a615516a8887fbbd096c46b6eda7202.tar.gz
target-arm: explicitly decode SEVL instruction
The ARMv8 SEVL instruction is in the architectural hint space already emulated as nop. This makes the decoding of SEVL explicit for clarity. Signed-off-by: Mans Rullgard <mans@mansr.com> Message-id: 1370606786-5650-3-git-send-email-mans@mansr.com [PMM: added 'SEVL' to the TODO comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/translate.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b7663dd3d8..7b50c8c308 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3501,7 +3501,8 @@ static void gen_nop_hint(DisasContext *s, int val)
break;
case 2: /* wfe */
case 4: /* sev */
- /* TODO: Implement SEV and WFE. May help SMP performance. */
+ case 5: /* sevl */
+ /* TODO: Implement SEV, SEVL and WFE. May help SMP performance. */
default: /* nop */
break;
}