diff options
| author | Michael Davidsaver <mdavidsaver@gmail.com> | 2015-12-02 19:18:45 -0500 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-23 13:33:40 +0000 |
| commit | 75cb253a50203b444dd801645642cbda68f6ae1c (patch) | |
| tree | 937e74f16432c6a554f21cb9fdc86ed38d95bf30 | |
| parent | bae3dbe0fb1f9370939dddb7042c65cdd7f4efc3 (diff) | |
armv7m: update base region policy
Update MPU background policy as per ARM.
Main changes are preventing writes to ROM
and no-exec for device regions.
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
| -rw-r--r-- | target/arm/helper.c | 35 |
1 files changed, 27 insertions, 8 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 9433ec68b1..c1ad7622b4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7960,16 +7960,35 @@ static inline void get_phys_addr_pmsav7_default(CPUARMState *env, ARMMMUIdx mmu_idx, int32_t address, int *prot) { - *prot = PAGE_READ | PAGE_WRITE; - switch (address) { - case 0xF0000000 ... 0xFFFFFFFF: - if (regime_sctlr(env, mmu_idx) & SCTLR_V) { /* hivecs execing is ok */ + if (!IS_M(env)) { + *prot = PAGE_READ | PAGE_WRITE; + switch (address) { + case 0xF0000000 ... 0xFFFFFFFF: + if (regime_sctlr(env, mmu_idx) & SCTLR_V) { + /* hivecs execing is ok */ + *prot |= PAGE_EXEC; + } + break; + case 0x00000000 ... 0x7FFFFFFF: *prot |= PAGE_EXEC; + break; + } + } else { + /* ARM specfies XN (PAGE_EXEC) but leaves R/W to implementation. + * Mark ROM as read only since writes would otherwise be ignored. + */ + switch (address) { + case 0 ... 0x1fffffff: /* ROM */ + *prot = PAGE_READ | PAGE_EXEC; + break; + case 0x20000000 ... 0x3fffffff: /* SRAM */ + case 0x60000000 ... 0x7fffffff: /* RAM */ + case 0x80000000 ... 0x9fffffff: /* RAM */ + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + break; + default: /* Peripheral, 2x Device, and System */ + *prot = PAGE_READ | PAGE_WRITE; } - break; - case 0x00000000 ... 0x7FFFFFFF: - *prot |= PAGE_EXEC; - break; } } |