diff options
| author | Michael Davidsaver <mdavidsaver@gmail.com> | 2015-12-02 19:18:41 -0500 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-23 13:33:40 +0000 |
| commit | 1a28e35aede1fc2a0668b6d9f7df5734369f35d9 (patch) | |
| tree | b54bcdb3ab8a018543669b3f7ec410d689fb397a | |
| parent | a67a5bb5c63479c1596459a122059a9ff9edaf98 (diff) | |
armv7m: prevent unprivileged write to STIR
Prevent unprivileged from writing to the
Software Triggered Interrupt register
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
| -rw-r--r-- | hw/intc/armv7m_nvic.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 782afadba0..8dddebb93b 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -732,7 +732,9 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value) "NVIC: Aux fault status registers unimplemented\n"); break; case 0xf00: /* Software Triggered Interrupt Register */ - if ((value & 0x1ff) < NVIC_MAX_IRQ) { + /* STIR write allowed if privlaged or USERSETMPEND set */ + if ((arm_current_el(&cpu->env) || (cpu->env.v7m.ccr & 2)) + && ((value & 0x1ff) < NVIC_MAX_IRQ)) { armv7m_nvic_set_pending(s, (value&0x1ff)+16); } break; |