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authorPaolo Bonzini <pbonzini@redhat.com>2012-07-11 16:40:21 +0200
committerBlue Swirl <blauwirbel@gmail.com>2012-07-28 09:16:09 +0000
commit1435ddb89c303c38ff23ff977dfb81953f32eb96 (patch)
treefb3b59c067473a697f6c0bfdd0c4a9fe70283e61
parentcdc976b040f2760103ce2fb49f4d504093a7163f (diff)
downloadqemu-arm-1435ddb89c303c38ff23ff977dfb81953f32eb96.tar.gz
build: get dependency file directories from object file names
After commit dcff25f2cd8c11a9368cc2369aeb0319c32d9e26, Dependency file are taken from the directories that have a Makefile.objs file. This is not enough, since files can be included from other directories. So, pick them from directories that have an object file in them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
-rw-r--r--Makefile4
-rw-r--r--Makefile.dis3
-rw-r--r--Makefile.hw3
-rw-r--r--Makefile.target3
-rw-r--r--Makefile.user3
-rw-r--r--rules.mak3
6 files changed, 4 insertions, 15 deletions
diff --git a/Makefile b/Makefile
index a20050346a..a1195ffa77 100644
--- a/Makefile
+++ b/Makefile
@@ -403,5 +403,5 @@ qemu-doc.dvi qemu-doc.html qemu-doc.info qemu-doc.pdf: \
Makefile: $(GENERATED_HEADERS)
# Include automatically generated dependency files
-# All subdir dependencies come automatically from our recursive subdir rules
--include $(wildcard *.d)
+# Dependencies in Makefile.objs files come from our recursive subdir rules
+-include $(wildcard *.d tests/*.d)
diff --git a/Makefile.dis b/Makefile.dis
index 09060f0a1a..2cfec6a358 100644
--- a/Makefile.dis
+++ b/Makefile.dis
@@ -18,6 +18,3 @@ all: $(libdis-y)
clean:
rm -f *.o *.d *.a *~
-
-# Include automatically generated dependency files
--include $(wildcard *.d)
diff --git a/Makefile.hw b/Makefile.hw
index 28fe100fbe..59f5b48350 100644
--- a/Makefile.hw
+++ b/Makefile.hw
@@ -21,6 +21,3 @@ all: $(hw-obj-y)
clean:
rm -f $(addsuffix *.o, $(sort $(dir $(hw-obj-y))))
rm -f $(addsuffix *.d, $(sort $(dir $(hw-obj-y))))
-
-# Include automatically generated dependency files
--include $(patsubst %.o, %.d, $(hw-obj-y))
diff --git a/Makefile.target b/Makefile.target
index 74f7a4a170..7892a8df63 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -214,6 +214,3 @@ endif
GENERATED_HEADERS += config-target.h
Makefile: $(GENERATED_HEADERS)
-
-# Include automatically generated dependency files
--include $(wildcard *.d fpu/*.d tcg/*.d)
diff --git a/Makefile.user b/Makefile.user
index 1783b2a257..9302d33245 100644
--- a/Makefile.user
+++ b/Makefile.user
@@ -22,6 +22,3 @@ clean:
for d in . trace; do \
rm -f $$d/*.o $$d/*.d $$d/*.a $$d/*~; \
done
-
-# Include automatically generated dependency files
--include $(wildcard *.d)
diff --git a/rules.mak b/rules.mak
index 60f3e96541..a28494679a 100644
--- a/rules.mak
+++ b/rules.mak
@@ -94,7 +94,6 @@ define unnest-dir
$(foreach var,$(nested-vars),$(call push-var,$(var),$1/))
$(eval obj := $(obj)/$1)
$(eval include $(SRC_PATH)/$1/Makefile.objs)
-$(eval -include $(wildcard $1/*.d))
$(eval obj := $(patsubst %/$1,%,$(obj)))
$(foreach var,$(nested-vars),$(call pop-var,$(var),$1/))
endef
@@ -113,4 +112,6 @@ define unnest-vars
$(call unnest-vars-1)
$(foreach var,$(nested-vars),$(eval $(var) := $(filter-out %/, $($(var)))))
$(shell mkdir -p $(sort $(foreach var,$(nested-vars),$(dir $($(var))))))
+$(foreach var,$(nested-vars), $(eval \
+ -include $(addsuffix *.d, $(sort $(dir $($(var)))))))
endef