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authorGreg Kurz <groug@kaod.org>2017-06-30 11:37:07 +0200
committerDavid Gibson <david@gibson.dropbear.id.au>2017-07-11 11:04:01 +1000
commitf3728f9cbbe3b5114e07ee5fdde810a63fee147e (patch)
treea74472f2bb215176dd64df2b9e18f4c526024a10
parent498cd99544a456f003e92342c7be471e967c1f31 (diff)
downloadqemu-arm-f3728f9cbbe3b5114e07ee5fdde810a63fee147e.tar.gz
spapr: fix bogus function name in comment
$ git grep spapr_ppc_reset hw/ppc/spapr.c: * as part of spapr_ppc_reset(). $ git grep ppc_spapr_reset hw/ppc/spapr.c:static void ppc_spapr_reset(void) hw/ppc/spapr.c: mc->reset = ppc_spapr_reset; hw/ppc/spapr_hcall.c: /* If ppc_spapr_reset() did not set up a HPT but one is necessary Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r--hw/ppc/spapr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 65d8ad2f49..5acfb47be9 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1973,7 +1973,7 @@ static void spapr_boot_set(void *opaque, const char *boot_device,
* Unlike PCI DR devices, LMB DR devices explicitly register this reset
* routine. Reset for PCI DR devices will be handled by PHB reset routine
* when it walks all its children devices. LMB devices reset occurs
- * as part of spapr_ppc_reset().
+ * as part of ppc_spapr_reset().
*/
static void spapr_drc_reset(void *opaque)
{