diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-07 17:31:01 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-07 17:31:24 +0100 |
| commit | 79a4ab2187d5ad5a2bb39b54bbb8f20f37a1ff21 (patch) | |
| tree | 0a2b5669f6973b3186c67a075153b001f67719cb | |
| parent | 0f830f0931474747bec041ca264ea2861660c0ae (diff) | |
target/arm: Implement MVE VMULH
Implement the MVE VMULH insn, which performs a vector
multiply and returns the high half of the result.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/helper-mve.h | 7 | ||||
| -rw-r--r-- | target/arm/mve.decode | 3 | ||||
| -rw-r--r-- | target/arm/mve_helper.c | 26 | ||||
| -rw-r--r-- | target/arm/translate-mve.c | 2 |
4 files changed, 38 insertions, 0 deletions
diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h index b7e9af2461..17219df315 100644 --- a/target/arm/helper-mve.h +++ b/target/arm/helper-mve.h @@ -83,3 +83,10 @@ DEF_HELPER_FLAGS_4(mve_vsubw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) DEF_HELPER_FLAGS_4(mve_vmulb, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) DEF_HELPER_FLAGS_4(mve_vmulh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) DEF_HELPER_FLAGS_4(mve_vmulw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) + +DEF_HELPER_FLAGS_4(mve_vmulhsb, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vmulhsh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vmulhsw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vmulhub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vmulhuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vmulhuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) diff --git a/target/arm/mve.decode b/target/arm/mve.decode index f7d1d303f1..ca4c27209d 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -82,6 +82,9 @@ VADD 1110 1111 0 . .. ... 0 ... 0 1000 . 1 . 0 ... 0 @2op VSUB 1111 1111 0 . .. ... 0 ... 0 1000 . 1 . 0 ... 0 @2op VMUL 1110 1111 0 . .. ... 0 ... 0 1001 . 1 . 1 ... 0 @2op +VMULH_S 111 0 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op +VMULH_U 111 1 1110 0 . .. ...1 ... 0 1110 . 0 . 0 ... 1 @2op + # Vector miscellaneous VCLS 1111 1111 1 . 11 .. 00 ... 0 0100 01 . 0 ... 0 @1op diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index 39ab684c0c..45b1b121ce 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -348,3 +348,29 @@ DO_2OP(veor, 1, uint8_t, H1, DO_EOR) DO_2OP_U(vadd, DO_ADD) DO_2OP_U(vsub, DO_SUB) DO_2OP_U(vmul, DO_MUL) + +/* + * Because the computation type is at least twice as large as required, + * these work for both signed and unsigned source types. + */ +static inline uint8_t do_mulh_b(int32_t n, int32_t m) +{ + return (n * m) >> 8; +} + +static inline uint16_t do_mulh_h(int32_t n, int32_t m) +{ + return (n * m) >> 16; +} + +static inline uint32_t do_mulh_w(int64_t n, int64_t m) +{ + return (n * m) >> 32; +} + +DO_2OP(vmulhsb, 1, int8_t, H1, do_mulh_b) +DO_2OP(vmulhsh, 2, int16_t, H2, do_mulh_h) +DO_2OP(vmulhsw, 4, int32_t, H4, do_mulh_w) +DO_2OP(vmulhub, 1, uint8_t, H1, do_mulh_b) +DO_2OP(vmulhuh, 2, uint16_t, H2, do_mulh_h) +DO_2OP(vmulhuw, 4, uint32_t, H4, do_mulh_w) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 1b2c8cd5ff..edea30ba1d 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -379,3 +379,5 @@ DO_LOGIC(VEOR, gen_helper_mve_veor) DO_2OP(VADD, vadd) DO_2OP(VSUB, vsub) DO_2OP(VMUL, vmul) +DO_2OP(VMULH_S, vmulhs) +DO_2OP(VMULH_U, vmulhu) |