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authorAlistair Francis <alistair.francis@xilinx.com>2016-02-18 14:16:17 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-02-18 14:26:20 +0000
commit8a83ffc2dafad3499b87a736b17ab1b203fdb00b (patch)
tree57d1214d53736f3d432d53a257d74eacd3aac971
parent978364f12adebb4b8d90fdeb71242cb3c1405740 (diff)
downloadqemu-arm-8a83ffc2dafad3499b87a736b17ab1b203fdb00b.tar.gz
target-arm: Add PMUSERENR_EL0 register
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington <christopher.covington@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: b30d536cb16ec57b4412172bb6dbc3f00d293e7d.1455060548.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/helper.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 9e47f3d8cb..5a0447b93a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1105,6 +1105,12 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
.fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr),
.resetvalue = 0,
.writefn = pmuserenr_write, .raw_writefn = raw_write },
+ { .name = "PMUSERENR_EL0", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 14, .opc2 = 0,
+ .access = PL0_R | PL1_RW, .type = ARM_CP_ALIAS,
+ .fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr),
+ .resetvalue = 0,
+ .writefn = pmuserenr_write, .raw_writefn = raw_write },
{ .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 1,
.access = PL1_RW,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),