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authorRichard Henderson <rth@twiddle.net>2014-09-13 09:45:27 -0700
committerPeter Maydell <peter.maydell@linaro.org>2014-09-25 18:54:22 +0100
commitfbb96c4b7f57d3d0943b11ad2cfa0ed770c9cf66 (patch)
tree676b55bb396e0f294a70cd242918fc8af50f8fc6
parent87afe467e276f9a9cad2ad610d3d330da7fc7fd3 (diff)
target-openrisc: Use cpu_exec_interrupt qom hook
Cc: Jia Liu <proljc@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Jia Liu <proljc@gmail.com> Message-id: 1410626734-3804-17-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--cpu-exec.c18
-rw-r--r--target-openrisc/cpu.c1
-rw-r--r--target-openrisc/cpu.h1
-rw-r--r--target-openrisc/interrupt.c20
4 files changed, 22 insertions, 18 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index 075abf907c..81441e7b05 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -528,24 +528,6 @@ int cpu_exec(CPUArchState *env)
cc->do_interrupt(cpu);
next_tb = 0;
}
-
-#elif defined(TARGET_OPENRISC)
- {
- int idx = -1;
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->sr & SR_IEE)) {
- idx = EXCP_INT;
- }
- if ((interrupt_request & CPU_INTERRUPT_TIMER)
- && (env->sr & SR_TEE)) {
- idx = EXCP_TICK;
- }
- if (idx >= 0) {
- cpu->exception_index = idx;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index 08e724c126..39bedc108e 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -165,6 +165,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = openrisc_cpu_class_by_name;
cc->has_work = openrisc_cpu_has_work;
cc->do_interrupt = openrisc_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
cc->dump_state = openrisc_cpu_dump_state;
cc->set_pc = openrisc_cpu_set_pc;
cc->gdb_read_register = openrisc_cpu_gdb_read_register;
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 4512f459bf..69b96c6666 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -348,6 +348,7 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
int cpu_openrisc_exec(CPUOpenRISCState *s);
void openrisc_cpu_do_interrupt(CPUState *cpu);
+bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req);
void openrisc_cpu_dump_state(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
index 3de567eee8..e480cfd1b7 100644
--- a/target-openrisc/interrupt.c
+++ b/target-openrisc/interrupt.c
@@ -63,3 +63,23 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
cs->exception_index = -1;
}
+
+bool openrisc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+ CPUOpenRISCState *env = &cpu->env;
+ int idx = -1;
+
+ if ((interrupt_request & CPU_INTERRUPT_HARD) && (env->sr & SR_IEE)) {
+ idx = EXCP_INT;
+ }
+ if ((interrupt_request & CPU_INTERRUPT_TIMER) && (env->sr & SR_TEE)) {
+ idx = EXCP_TICK;
+ }
+ if (idx >= 0) {
+ cs->exception_index = idx;
+ openrisc_cpu_do_interrupt(cs);
+ return true;
+ }
+ return false;
+}