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authorRichard Sandiford <rdsandiford@googlemail.com>2012-08-27 09:53:29 +0100
committerAurelien Jarno <aurelien@aurel32.net>2012-08-27 12:03:18 +0200
commit13d24f49720a3e7b35a21222ef182c8513f139db (patch)
treedcebaa9518ae4273ac02d5c8280ee1fa73d78139
parentd22d7289877ecd3ef86570f6f6d0574da40711dc (diff)
downloadqemu-arm-13d24f49720a3e7b35a21222ef182c8513f139db.tar.gz
Fix order of CVT.PS.S operands
The FS input to CVT.PS.S is the high half and FT is the low half. tcg_gen_concat_i32_i64 takes the low half first, so the operands were in the wrong order. Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 2589f63b35..d8129864ed 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -6900,7 +6900,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
gen_load_fpr32(fp32_0, fs);
gen_load_fpr32(fp32_1, ft);
- tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
+ tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
tcg_temp_free_i32(fp32_1);
tcg_temp_free_i32(fp32_0);
gen_store_fpr64(ctx, fp64, fd);