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authorPeter Maydell <peter.maydell@linaro.org>2010-12-07 15:37:34 +0000
committerPeter Maydell <peter.maydell@linaro.org>2010-12-07 15:37:34 +0000
commit26a5e69aafd0434922316e4185c45c9bddd4b9ba (patch)
tree39454da0d38bb888137b43f993177ab77210b938
parent2d6277373d3fc18f11504cd05ea82f0fe6d67962 (diff)
downloadqemu-arm-26a5e69aafd0434922316e4185c45c9bddd4b9ba.tar.gz
ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point
VCVT of 16 bit fixed point to float should ignore the top 16 bits of the source register. Cast to int16_t and friends rather than int16 -- the former is guaranteed exactly 16 bits wide where the latter is merely at least 16 bits wide (and so is usually 32 bits). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4bd1cd4fa4..292578235b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2549,7 +2549,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env)
ftype VFP_HELPER(name##to, p)(ftype x, uint32_t shift, CPUState *env) \
{ \
ftype tmp; \
- tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(x), \
+ tmp = sign##int32_to_##ftype ((itype##_t)vfp_##p##toi(x), \
&env->vfp.fp_status); \
return ftype##_scalbn(tmp, -(int)shift, &env->vfp.fp_status); \
} \