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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2013-06-18 21:12:41 +1000
committerPeter Maydell <peter.maydell@linaro.org>2013-06-25 19:15:46 +0100
commit7426aa72c36c908a7d0eae3e38568bb0a70de479 (patch)
treeca9dffaa49fe73dfad0a0b1e018fa5dfd5ce7ec7
parentd47a5d9b9dda19f975320b72c386c581dad32c7a (diff)
downloadqemu-arm-7426aa72c36c908a7d0eae3e38568bb0a70de479.tar.gz
nand: Don't inherit from Sysbuspull-arm-devs-20130625
Nand chips are not sysbus devices - they do not have any sense of MMIO, nor interrupts. Re-parent to TYPE_DEVICE accordingly. Cc: afaerber@suse.de Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/block/nand.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/block/nand.c b/hw/block/nand.c
index a0232d1849..a871ce059a 100644
--- a/hw/block/nand.c
+++ b/hw/block/nand.c
@@ -21,7 +21,7 @@
# include "hw/hw.h"
# include "hw/block/flash.h"
# include "sysemu/blockdev.h"
-# include "hw/sysbus.h"
+#include "hw/qdev.h"
#include "qemu/error-report.h"
# define NAND_CMD_READ0 0x00
@@ -54,7 +54,8 @@
typedef struct NANDFlashState NANDFlashState;
struct NANDFlashState {
- SysBusDevice busdev;
+ DeviceState parent_obj;
+
uint8_t manf_id, chip_id;
uint8_t buswidth; /* in BYTES */
int size, pages;
@@ -440,7 +441,7 @@ static void nand_class_init(ObjectClass *klass, void *data)
static const TypeInfo nand_info = {
.name = TYPE_NAND,
- .parent = TYPE_SYS_BUS_DEVICE,
+ .parent = TYPE_DEVICE,
.instance_size = sizeof(NANDFlashState),
.class_init = nand_class_init,
};