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authorStefan Fritsch <sf@sfritsch.de>2015-07-20 12:21:18 -0400
committerJohn Snow <jsnow@redhat.com>2015-07-20 12:21:18 -0400
commit09b61db7c140c5a71bfde36614c5a1f4f0d382a6 (patch)
treecf7ee0a40a6fb56313e4f2b34e3ffd172e4a0c02
parent58732810230719765a6618004be8f0070c9f3d31 (diff)
downloadqemu-arm-09b61db7c140c5a71bfde36614c5a1f4f0d382a6.tar.gz
ahci: Force ICC bits in PxCMD to zero
The AHCI spec requires that the HBA sets the ICC bits to zero after the ICC change is done. Since we don't do any ICC change, force the bits to zero all the time. This fixes delays with some OSs (e.g. OpenBSD) waiting for the ICC bits to change to 0. Signed-off-by: Stefan Fritsch <sf@sfritsch.de> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: E1ZFpg7-00027N-HW@eru.sfritsch.de Signed-off-by: John Snow <jsnow@redhat.com>
-rw-r--r--hw/ide/ahci.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index bb6a92f7f4..48749c1dc1 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -279,8 +279,13 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val)
break;
case PORT_CMD:
/* Block any Read-only fields from being set;
- * including LIST_ON and FIS_ON. */
- pr->cmd = (pr->cmd & PORT_CMD_RO_MASK) | (val & ~PORT_CMD_RO_MASK);
+ * including LIST_ON and FIS_ON.
+ * The spec requires to set ICC bits to zero after the ICC change
+ * is done. We don't support ICC state changes, therefore always
+ * force the ICC bits to zero.
+ */
+ pr->cmd = (pr->cmd & PORT_CMD_RO_MASK) |
+ (val & ~(PORT_CMD_RO_MASK|PORT_CMD_ICC_MASK));
/* Check FIS RX and CLB engines, allow transition to false: */
ahci_cond_start_engines(&s->dev[port], true);