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authorPeter Maydell <peter.maydell@linaro.org>2014-08-07 18:42:01 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-08-18 12:17:56 +0100
commit67eef86074b3ef48eb504cfa5f373e4dab0c504c (patch)
tree1df2c79ca0f4dcb51c65e87291664853b172f8d1
parent27c7ecb3778c643ea0eeea8270e238bfa0d1c20b (diff)
downloadqemu-arm-67eef86074b3ef48eb504cfa5f373e4dab0c504c.tar.gz
target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14
Currently the STATE_BOTH shorthand for allowing a single reginfo struct to define handling for both AArch32 and AArch64 views of a register only permits this where the AArch32 view is in cp15. It turns out that the debug registers in cp14 also have neatly lined up encodings; allow these also to share reginfo structs by permitting a STATE_BOTH reginfo to specify the .cp field (and continue to default to 15 if it is not specified). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/helper.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a9be7ba172..8239aea93b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2800,9 +2800,11 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
/* The AArch32 view of a shared register sees the lower 32 bits
* of a 64 bit backing field. It is not migratable as the AArch64
* view handles that. AArch64 also handles reset.
- * We assume it is a cp15 register.
+ * We assume it is a cp15 register if the .cp field is left unset.
*/
- r2->cp = 15;
+ if (r2->cp == 0) {
+ r2->cp = 15;
+ }
r2->type |= ARM_CP_NO_MIGRATE;
r2->resetfn = arm_cp_reset_ignore;
#ifdef HOST_WORDS_BIGENDIAN
@@ -2815,8 +2817,11 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
/* To allow abbreviation of ARMCPRegInfo
* definitions, we treat cp == 0 as equivalent to
* the value for "standard guest-visible sysreg".
+ * STATE_BOTH definitions are also always "standard
+ * sysreg" in their AArch64 view (the .cp value may
+ * be non-zero for the benefit of the AArch32 view).
*/
- if (r->cp == 0) {
+ if (r->cp == 0 || r->state == ARM_CP_STATE_BOTH) {
r2->cp = CP_REG_ARM64_SYSREG_CP;
}
*key = ENCODE_AA64_CP_REG(r2->cp, r2->crn, crm,