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authorAndreas Färber <afaerber@suse.de>2013-09-01 16:51:34 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:47 +0100
commit3f38f309b22d9a30b5b427501eb3d522c439482e (patch)
tree9536fe55f500c6f99879a1bc35d2b5efbb22c706
parent5638d180d6c469fc4c56127a3c717e8b9f27d925 (diff)
translate-all: Change cpu_restore_state() argument to CPUState
This lets us drop some local variables in tlb_fill() functions. Signed-off-by: Andreas Färber <afaerber@suse.de>
-rw-r--r--hw/i386/kvmvapic.c2
-rw-r--r--include/exec/exec-all.h2
-rw-r--r--target-alpha/helper.c2
-rw-r--r--target-alpha/mem_helper.c7
-rw-r--r--target-arm/op_helper.c2
-rw-r--r--target-cris/op_helper.c2
-rw-r--r--target-i386/helper.c2
-rw-r--r--target-i386/mem_helper.c2
-rw-r--r--target-lm32/op_helper.c5
-rw-r--r--target-m68k/op_helper.c5
-rw-r--r--target-microblaze/op_helper.c5
-rw-r--r--target-mips/op_helper.c2
-rw-r--r--target-moxie/helper.c6
-rw-r--r--target-openrisc/mmu_helper.c5
-rw-r--r--target-ppc/mmu_helper.c2
-rw-r--r--target-s390x/mem_helper.c5
-rw-r--r--target-s390x/misc_helper.c2
-rw-r--r--target-sh4/op_helper.c7
-rw-r--r--target-sparc/helper.c20
-rw-r--r--target-sparc/ldst_helper.c8
-rw-r--r--target-unicore32/op_helper.c5
-rw-r--r--target-xtensa/op_helper.c6
-rw-r--r--translate-all.c3
-rw-r--r--user-exec.c2
24 files changed, 46 insertions, 63 deletions
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 6cf5d41155..39d516a46e 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -406,7 +406,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
}
if (!kvm_enabled()) {
- cpu_restore_state(env, cs->mem_io_pc);
+ cpu_restore_state(cs, cs->mem_io_pc);
cpu_get_tb_cpu_state(env, &current_pc, &current_cs_base,
&current_flags);
}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 80277eac32..cf5cd7100f 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -80,7 +80,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
void cpu_gen_init(void);
int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
int *gen_code_size_ptr);
-bool cpu_restore_state(CPUArchState *env, uintptr_t searched_pc);
+bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 45f73e0ea2..305dd67b84 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -526,7 +526,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
cs->exception_index = excp;
env->error_code = error;
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index 1957c566b9..5964bdcda8 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -105,7 +105,7 @@ static void do_unaligned_access(CPUAlphaState *env, target_ulong addr,
uint32_t insn;
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
pc = env->pc;
@@ -159,11 +159,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret != 0)) {
- AlphaCPU *cpu = ALPHA_CPU(cs);
- CPUAlphaState *env = &cpu->env;
-
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
/* Exception index and error code are already set */
cpu_loop_exit(cs);
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index f8e535e8ce..21ff58e754 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -87,7 +87,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
raise_exception(env, cs->exception_index);
}
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index d80b6c966d..d28bd61778 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -67,7 +67,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
if (unlikely(ret)) {
if (retaddr) {
/* now we have a real cpu fault */
- if (cpu_restore_state(env, retaddr)) {
+ if (cpu_restore_state(cs, retaddr)) {
/* Evaluate flags after retranslation. */
helper_top_evaluate_flags(env);
}
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 59736d7a4f..cb29aa4b0e 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1263,7 +1263,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
cpu_interrupt(cs, CPU_INTERRUPT_TPR);
} else {
- cpu_restore_state(env, cs->mem_io_pc);
+ cpu_restore_state(cs, cs->mem_io_pc);
apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
}
diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c
index 2f0691be8f..b3b811bc8c 100644
--- a/target-i386/mem_helper.c
+++ b/target-i386/mem_helper.c
@@ -145,7 +145,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
raise_exception_err(env, cs->exception_index, env->error_code);
}
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index f0859aab6d..2f36b7b053 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -160,12 +160,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = lm32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
- LM32CPU *cpu = LM32_CPU(cs);
- CPULM32State *env = &cpu->env;
-
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index d6268cd6b9..06302b1071 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -60,12 +60,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
- M68kCPU *cpu = M68K_CPU(cs);
- CPUM68KState *env = &cpu->env;
-
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
index f47613241d..f8fb7f9169 100644
--- a/target-microblaze/op_helper.c
+++ b/target-microblaze/op_helper.c
@@ -49,12 +49,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = mb_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
- MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
- CPUMBState *env = &cpu->env;
-
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index c65350187f..de5a22329a 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -48,7 +48,7 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
if (pc) {
/* now we have a real cpu fault */
- cpu_restore_state(env, pc);
+ cpu_restore_state(cs, pc);
}
cpu_loop_exit(cs);
diff --git a/target-moxie/helper.c b/target-moxie/helper.c
index 3994c0910d..04b36b78b5 100644
--- a/target-moxie/helper.c
+++ b/target-moxie/helper.c
@@ -49,14 +49,12 @@
void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr)
{
- MoxieCPU *cpu = MOXIE_CPU(cs);
- CPUMoxieState *env = &cpu->env;
int ret;
ret = moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
}
cpu_loop_exit(cs);
@@ -70,7 +68,7 @@ void helper_raise_exception(CPUMoxieState *env, int ex)
/* Stash the exception type. */
env->sregs[2] = ex;
/* Stash the address where the exception occurred. */
- cpu_restore_state(env, GETPC());
+ cpu_restore_state(cs, GETPC());
env->sregs[5] = env->pc;
/* Jump the the exception handline routine. */
env->pc = env->sregs[1];
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index 5f7f6f5ac4..fb457c76af 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -44,12 +44,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
ret = openrisc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (ret) {
- OpenRISCCPU *cpu = OPENRISC_CPU(cs);
- CPUOpenRISCState *env = &cpu->env;
-
if (retaddr) {
/* now we have a real cpu fault. */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
/* Raise Exception. */
cpu_loop_exit(cs);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index c0421848b1..2a94f3d67f 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2909,7 +2909,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
if (unlikely(ret != 0)) {
if (likely(retaddr)) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
helper_raise_exception_err(env, cs->exception_index, env->error_code);
}
diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
index e89fcac4e2..e1c2ac04d1 100644
--- a/target-s390x/mem_helper.c
+++ b/target-s390x/mem_helper.c
@@ -51,12 +51,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = s390_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret != 0)) {
- S390CPU *cpu = S390_CPU(cs);
- CPUS390XState *env = &cpu->env;
-
if (likely(retaddr)) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index 2beec61a2b..942b5f7487 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -54,7 +54,7 @@ void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
env->int_pgm_code = excp;
/* Use the (ultimate) callers address to find the insn that trapped. */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
/* Advance past the insn. */
t = cpu_ldub_code(env, env->psw.addr);
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 271401f699..b3ce7bad53 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -46,11 +46,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = superh_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (ret) {
/* now we have a real cpu fault */
- SuperHCPU *cpu = SUPERH_CPU(cs);
- CPUSH4State *env = &cpu->env;
-
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
@@ -75,7 +72,7 @@ static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
cs->exception_index = index;
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index fb5f6ecd38..f3c7fbf993 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -71,6 +71,7 @@ void helper_tick_set_limit(void *opaque, uint64_t limit)
static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a,
target_ulong b, int cc)
{
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
int overflow = 0;
uint64_t x0;
uint32_t x1;
@@ -79,7 +80,7 @@ static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a,
x1 = (b & 0xffffffff);
if (x1 == 0) {
- cpu_restore_state(env, GETPC());
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_DIV_ZERO);
}
@@ -110,6 +111,7 @@ target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a,
target_ulong b, int cc)
{
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
int overflow = 0;
int64_t x0;
int32_t x1;
@@ -118,7 +120,7 @@ static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a,
x1 = (b & 0xffffffff);
if (x1 == 0) {
- cpu_restore_state(env, GETPC());
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_DIV_ZERO);
}
@@ -151,7 +153,9 @@ int64_t helper_sdivx(CPUSPARCState *env, int64_t a, int64_t b)
{
if (b == 0) {
/* Raise divide by zero trap. */
- cpu_restore_state(env, GETPC());
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
+
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_DIV_ZERO);
} else if (b == -1) {
/* Avoid overflow trap with i386 divide insn. */
@@ -165,7 +169,9 @@ uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
{
if (b == 0) {
/* Raise divide by zero trap. */
- cpu_restore_state(env, GETPC());
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
+
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_DIV_ZERO);
}
return a / b;
@@ -175,6 +181,7 @@ uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, uint64_t b)
target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
target_ulong src2)
{
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
target_ulong dst;
/* Tag overflow occurs if either input has bits 0 or 1 set. */
@@ -197,13 +204,14 @@ target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1,
return dst;
tag_overflow:
- cpu_restore_state(env, GETPC());
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_TOVF);
}
target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
target_ulong src2)
{
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
target_ulong dst;
/* Tag overflow occurs if either input has bits 0 or 1 set. */
@@ -226,7 +234,7 @@ target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1,
return dst;
tag_overflow:
- cpu_restore_state(env, GETPC());
+ cpu_restore_state(CPU(cpu), GETPC());
helper_raise_exception(env, TT_TOVF);
}
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 8302bb14c2..1f6df49e88 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -2424,12 +2424,13 @@ static void QEMU_NORETURN do_unaligned_access(CPUSPARCState *env,
target_ulong addr, int is_write,
int is_user, uintptr_t retaddr)
{
+ SPARCCPU *cpu = sparc_env_get_cpu(env);
#ifdef DEBUG_UNALIGNED
printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx
"\n", addr, env->pc);
#endif
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(CPU(cpu), retaddr);
}
helper_raise_exception(env, TT_UNALIGNED);
}
@@ -2445,11 +2446,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
ret = sparc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (ret) {
- SPARCCPU *cpu = SPARC_CPU(cs);
- CPUSPARCState *env = &cpu->env;
-
if (retaddr) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c
index c2bf834c27..4c6950d506 100644
--- a/target-unicore32/op_helper.c
+++ b/target-unicore32/op_helper.c
@@ -264,12 +264,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
ret = uc32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (unlikely(ret)) {
- UniCore32CPU *cpu = UNICORE32_CPU(cs);
- CPUUniCore32State *env = &cpu->env;
-
if (retaddr) {
/* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 42653784cd..8233443eb0 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -52,9 +52,11 @@ static void do_unaligned_access(CPUXtensaState *env,
static void do_unaligned_access(CPUXtensaState *env,
target_ulong addr, int is_write, int is_user, uintptr_t retaddr)
{
+ XtensaCPU *cpu = xtensa_env_get_cpu(env);
+
if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
!xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(CPU(cpu), retaddr);
HELPER(exception_cause_vaddr)(env,
env->pc, LOAD_STORE_ALIGNMENT_CAUSE, addr);
}
@@ -80,7 +82,7 @@ void tlb_fill(CPUState *cs,
paddr & TARGET_PAGE_MASK,
access, mmu_idx, page_size);
} else {
- cpu_restore_state(env, retaddr);
+ cpu_restore_state(cs, retaddr);
HELPER(exception_cause_vaddr)(env, env->pc, ret, vaddr);
}
}
diff --git a/translate-all.c b/translate-all.c
index c067011684..70d8229451 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -253,8 +253,9 @@ static int cpu_restore_state_from_tb(TranslationBlock *tb, CPUArchState *env,
return 0;
}
-bool cpu_restore_state(CPUArchState *env, uintptr_t retaddr)
+bool cpu_restore_state(CPUState *cpu, uintptr_t retaddr)
{
+ CPUArchState *env = cpu->env_ptr;
TranslationBlock *tb;
tb = tb_find_pc(retaddr);
diff --git a/user-exec.c b/user-exec.c
index e149c9732f..75c6d5486b 100644
--- a/user-exec.c
+++ b/user-exec.c
@@ -117,7 +117,7 @@ static inline int handle_cpu_signal(uintptr_t pc, unsigned long address,
return 1; /* the MMU fault was handled without causing real CPU fault */
}
/* now we have a real cpu fault */
- cpu_restore_state(env, pc);
+ cpu_restore_state(cpu, pc);
/* we restore the process signal mask as the sigreturn should
do it (XXX: use sigsetjmp) */